Hi all!
I'm thinking about going up to VCF in Wall next weekend. I haven't been
to it since it was the Trenton Computer Fest (think late 1990's) so I'm
not sure what the protocol is on tailgating, trading stuff or whatnot.
Appears that they have a "sale room" you drop things off in with prices.
Ok....
Things I could "sell" if anyone's interested:
HP1000e computer, dead power supply, basic boards, no advanced memory.
HP9825B likewise does not power up, but it's there.
Microvax 2 boards, stuff like that.
Spare 11/24 CPU boards (I have a bunch, all work, no idea why I have all
them)
Stuff I could bring to get out of my house and into the right hands:
Big box of pdp12 schematics. This came from my olden days when I had to
turn up a pdp12 because it will not fit in a station wagon. Still it
looks like board locations and a lot of 12 stuff. Big box, heavy to
ship, easier to drive over.
Ton of pdp8/12 IO cables. These are the black circular wire ones, I
think negibus. There's also some posibus ribbon cables but I'll save
those for my 8/L's. If you need a set, let me know.
Stuff I'd trade for:
AF01 A/D converter. I don't have Negibus anymore, but I did check/reform
the power supply and hooked it up and things do light up. Bunch of extra
channel cards (I think it might have all 64). Would trade for a memory
box for an 8/L.
Back to unearthing BLT.AI.MIT.EDU.......
C
I have a Quantum ATL-7100 100 tape DLT changer. Last I checked it worked
fine. It's almost as big as a fridge. I have around 100 tapes for it,
not all the same density. It uses fast/wide scsi-3 differential for the
drives. I think I have 2 working drives in the cabinet plus one or 2
separate external drives.
I think my drives are DLT-7000 or similar which gives a total capacity
of 7TB.
Upgraded with SDLT 220 drives and tapes the chassis would have a
capacity of 22TB.
Anyone interested in picking this up in South Jordan Utah? (outside Salt
Lake City).
The only issues I know about it, is the tape loading pivoting door is
not quite rotating correctly, and I replaced one of the AT power
supplies with a unit that is NOT autoswitching. So if you want to run
the unit on 220V instead of 110, you will need to change the chassis and
the replaced internal power supply.
It's really fun to load it up with tapes, then tell it to auto-shuffle
them. I have the door hot wired so you can open the door while it's
operating. Easy to restore the switch if you don't want to.
Photos here:
https://rikers.org/gallery/hardware-atl7100
Interested, please email directly, I don't check the list very often.
Tim
Hi all,
I?ve recently come across something i?ve soon realised really quite unusual. An RCA MS2000 MicroDisk Development System.
I?m very green to the COSMAC scene, with this being my first 1802 machine. I?m very interested in knowing the pitfalls i may come across in restoring such a machine. I?ve had a quick cursory look over the machine, and it seems to be complete, with 2 RAM/ROM cards, CPU card, FDC and a (3rd party?) ROM programmer board, along with the PSU and floppy disk drives.
It?s my understanding that these are pretty similar to the RCA Microboard development systems, which i believe are also pretty similar to the ELF ?homebrew? microcomputer this group revolves around. I?ve found some manuals on bitsavers,, a website on the Microboard system, along with disk images on the Emma02 emulator website, so I have a reasonable undertanding over what this actually is.
I have a week off work next week, so am planning on taking my time on disassembling and checking the unit over next week.
I?ll endevour to upload some pictures of said machine when i tear it apart.
Thanks,
Josh Rice
This is a long shot, but on the off chance anyone else on the list shares some of my particular weirdnesses, anyone got a line on the *patches* for Embarcadero (nee Borland (nee Starbase (nee Premia) CodeWright?
I have the latest version Embarcadero sold (and maybe still sells?) as of not all that long ago -- 7.5 -- but it's basically patch level 3 (e.g., 7.5.3) instead of patch level 5 (e.g., 7.5.5). I'm hoping someone has the patch installers squirreled away somewhere, and that I can find that person.
At least for Windows, patch installers were typically named something like "xcw753_4.exe", which would update an existing version 7.5.3 to version 7.5.4. Likewise xcw754_5.exe would update 7.5.4 to 7.5.5.
Every now and again, I go looking for archives in The Wayback Machine, etc. or stashed away versions of the patch installers, but no dice so far. I've even attempted emailing folks who posted 10+ years ago or more on various fora about the patches/about CodeWright, but nothing has yet worked out there either.
--
Daniel Moniz <dnm at pobox.com> [http://pobox.com/~dnm/]
Hi all,
you're invited to the Update computer club[0] public lecture series
"Updateringar"[1]!
When: 2022-04-09, 19:00 CEST
Where: https://bbb.cryptoparty.se/b/upd-0mo-m2u-aq8
A tour of Update's new premises
In December and January 2021/2022 Update moved out of the Uppsala
University IT department's basement into rooms of its own (thanks again
to all our volumteers who put in a huge effort!). The new premises offer
150 m? of space for Update's collection and activities, with a dedicated
area for exhibitions. What has happened since the move? With this online
tour we invite you to take a peek into our new home and at what we've
been working on in the last couple of months. We will give you an
insight into current and future projects and show off some of our
collection items.
Bjarni Juliusson, Anke St?ber (Update)
The lecture is free and open to everyone.
Don't want to miss upcoming events? Subscribe to our low-traffic
announcement list here[2]!
Hope to see you there,
Anke
[0] https://www.dfupdate.se/en/
[1] https://wiki.dfupdate.se/projekt:updateringar
[2] https://lists.dfupdate.se/postorius/lists/announce.lists.dfupdate.se
> the later "pdp11 bus hanbook" (which, as mentioned, does not seem to be
> online yet, alas)
Arck, I'm a moron; Paul has pointed out to me that this is, in fact, online
at Bitsavers:
http://www.bitsavers.org/pdf/dec/pdp11/handbooks/PDP11_BusHandbook1979.pdf
It didn't show up in a couple of pages of results in a Web search for it,
though.
I have noticed that things on Bitsavers often don't show up high up in Web
search results, unless you add 'bitsavers' to the search term.
I have been told that at one point Google was 'downgrading' results that used
plain HTTP, instead of HTTPS, because they were trying to push people to
switch to HTTPS (this was when everyone was hyperventilating over the Snowden
revelations). Given the near-ubiquitous use of HTTPS these days, I'd have
thought that piece of 'information credit engineering' by our tech overlords
was past its 'sell by' date, and now serves primarily to block people from
finding the material they are looking for (as here).
Noel
Continuing the debugging of my recently acquired PDP-8/E, I wrote an address
test that's easy to enter from the front panel:
---
# PDP8 Quick Address Test
# Pass 1: Loads locations 23-7777 with their own address.
# Pass 2: Tests each location for the correct address. If
# it fails (address does not equal it's own address) then
# the diagnostic halts with the error location in 22.
# The contents of that location displays the error.
# By Lyle Bickley
#
0000 7600 CLA
0001 1021 TAD 21
0002 3022 DCA 22
0003 1022 TAD 22
0004 3422 DCA I 22
0005 2022 ISZ 22
0006 5003 JMP 3
0007 1021 TAD 21
0010 3022 DCA 22
0011 1022 TAD 22
0012 7041 CMA IAC
0013 1422 TAD I 22
0014 7440 SZA
0015 7402 HLT (ERROR!)
0016 2022 ISZ 22
0017 5011 JMP 11
0020 5000 JMP 0 (START OVER)
0021 0023
0022 0000
---
Cheers,
Lyle
--
73 NM6Y
Bickley Consulting West
https://bickleywest.com
"Black holes are where God is dividing by zero"
> From: Paul Koning
> You might give a precise source citation on that page.
Done:
https://gunkies.org/w/index.php?title=UNIBUS_Initialization&curid=6842&diff…
Don't complain to me if the publication data is skimpy; that's all that's in
it! (I mean, we all know that DEC is in Maynard, but the book doesn't say it...)
Noel
So, I looked at the early editions of the "pdp11 peripherals hanbook", which
have good, detailed discussions of UNIBUS operations (at the back; chapter 5,
"UNIBUS Theory and Operation", in the 1976 edition), but in contrast to the
level of detail given for master/slave operations, and bus requests and
interrupts, the level of detail on power up/down is very low, especially
compared to that in the later "pdp11 bus hanbook" (which, as mentioned, does
not seem to be online yet, alas). So, I have transcribed that section, and
posted it:
https://gunkies.org/wiki/UNIBUS_Initialization
I have yet to scan and post the associated timing diagrams (which are useful,
but not critical); the desktop that runs my scanner is down at the moment,
alas. (If anyone who has a copy would like to volunteer to scan them, that
would be great.)
Noel
>From here:
https://setiathome.berkeley.edu/forum_thread.php?id=85870&postid=2096776#20…
They are bog standard Sun Enterprise systems, drive removed and destroyed
for privacy reason. They are only interesting for what they've done. By
university rules, our group can essentially "permanent loan" them to a
non-profit, but any sale or transfer of ownership is up to
University Excess and Salvage.
A bit of history disappearing, which is nothing new in this group.
On Fri, Apr 1, 2022 at 10:26 PM Marc Howard via cctech <
cctech at classiccmp.org> wrote:
> We need to onshore Nixie production now! ;-)
>
Gentle plug for https://www.daliborfarny.com/.
I have three AlphaServer 2100 systems in storage in the UK
(Oxfordshire). The storage, however, is due to be demolished (soon, but
no fixed date).
I won't have room to store these three systems, so if anyone would be
interested in offering them a home, then please get in touch!
I can probably get some pictures in the next day or two.
These systems were SMP Alphas and could sport as many as 4 CPUs. I'm not
sure of the configuration of these systems but I can probably find that
out soon.
They have not been run since ~2003 so they may be in need of some TLC.
OTOH they are not rusted to death so you have a chance of getting them
back to life.
Just so you know what you might be dealing with these systems are about:
700mm H x 430mm W x 810mm L.
I can't find the weight in any of my references right now but they are
very heavy. Three people can move them up a slight slope with some
effort but you would not successfully lift it into a car (assuming that
it would fit). I'm planning to dismantle them to move them (i.e. remove
PSU/PSUs etc. until they are light enough to move). A tail-lift would
probably be the sane way to go (and is, indeed, how they got to their
current location.
I'm hoping that someone can step forward and offer one or more of these
machines a new home. Please contact me off-list (once you're sure you
understand what you are getting into :-)).
Antonio
--
Antonio Carlini
antonio at acarlini.com
This may be of interest to some list members, particularly those who have an
interest in the BBC computer or just like Twilight Zone type stories.
Apart from being extremely interested in classic computers I also like the
old stories that surround these old machines. A while ago I stumbled across
a story about a BBC computer (this is the short version) that had been lent
out from a school l think (as they did in those days due to the cost of
machines back then) and this BBC, despite apparently not being connected to
anything, started displaying messages from the past (a previous land owner)
and someone in the future. As I said this is the short version of the story
- it's also referred to as the Dodleston Messages or even the Dodleston
Files if anyone wants to Google it. One of the claims was that this BBC
proved the existence of time travel - WOW, a big claim.
So the story eventually found its way into a book, The Vertical Plane by Ken
Webster (1989). I believe the book gets its title from the way scientists
describe time.
So being interested in the stories I started my world-wide hunt for a copy.
That was tough. A new copy unobtainable, an electronic copy not to my liking
- I like the real thing, used copies were monumentally expensive (apparently
the first edition was highly collectable). So I resigned myself to maybe one
day I would stumble across a copy in a used book shop or an Op Shop (aka
Thrift Shop) or a second hand shop. I visit these regularly because its
amazing what pops up in them.
Much to my surprise in February this year a Second Edition of The Vertical
Plane was published and of course obtained for me by my local bookshop.
My take - a good yarn - yes, do I believe the story - no.
Please note, I have no connection with the editor or the publisher.
Kevin Parker
Hello.
I have an HP 9000/217 (9817) machine that I'd like to install HP-UX 5.1 onto. In order to do this, I need to find the boot disk containing the correct kernel, which has the part number "A98680B", and is described as "Multi-user kernel for S200". Alternatively, I could run just the single-user version of HP-UX 5.1, which has the part number of "A98670B". The disk images for HP-UX 5.1 on bitsavers.org and hpmuseum.net do not have this disk.
I found these numbers in the HP-UX administrator manual. Page 370 lists the kernel disks and their contents.
http://bitsavers.org/pdf/hp/9000_hpux/1985/97033-90049_HP-UX_System_Adminis…
If anyone can point me in the right direction, it'd be greatly appreciated!
Thanks.
> From: "Rob Jarratt"
> I did plug the connector back in, so that DCLO and
> LTC are connected, I just removed the ACLO pin.
Ah, OK, good. Pulling the pins from those Mate-n-Loc shells without the right
tool is tricky; glad you did it, because as Brent Hilpert pointed out, having
a working DCLO is important, to reset everything to a known state on power-on.
> I didn't look for replacements last night. Is there a modern
> equivalent?
Not that I know of. Even if you found something with the same pin-out,
supposedly DEC selected ones that were 'good enough'. I've never had an issue
with NOS ones that I bought from vendors, though.
> I may have found a source of NOS.
Great; get several, they're a useful chip to have around; the QBUS uses them,
as well as the UNIBUS.
If the same place has DS8640's (the receiver), save on shipping (and ordering
delays) and get a couple of those too. I say that because depending on what
else you had plugged into the UNIBUS post ACLO failure, the -15V may have
damaged them too.
The M9312 (not sure if you had one of those, but the -11/24 manual says it's
common in them) uses ACLO (via a DS8640). The KY24 seems not to (as far as I
can tell from a quick look - negative results from a quick print scan aren't
100.00% reliable, whereas positive ones are), oddly enough. In EUB memory
(not sure which you have), the MS11-L and MS11M MS11-P don't seem to, whereas
the MS11-P _drives_ ACLO (through an 8881) - probably to prevent CPU startup
until the ECC is cleared). Etc, etc.
> I always marvel at how neatly those wires are done, I wish I knew how
> to do such a neat job.
The same way the old joke says one gets to Carnegie Hall, I expect! :-)
(I wonder what the UK equivalent of the Carnegie is - the Royal Albert,
probably?)
Noel
> The 'unused' gate in E52 is the one that the added wires from the ACLO
> ECO went to; I wonder if it was damaged by the -15V, somehow?
So, I checked, and the wire that goes from the plated-through hole next to the
etch cut on E70p1 winds up at E52p4 (the bus line on that transceiver),
thereby connecting the latter directly to UNIBUS ACLO (on pin BF1). So that's
almost certainly what caused other gate(s) in E52 to fail.
I think I have managed to trace where all the other two wires to that 'new'
gate in E52 went to/from, to see exactly what the ECO is. Given that E52 is a
transceiver, it was likely substituted for E70 so that the KDF11-U could also
_drive_ BUS ACLO.
I discovered that E52p5 (the new transceiver's input) is connected to E73p13
(an DS8640 quad NOR used as a bus reciver); that's in the upper left corner of
K2. It's BUS PB L NOR BUS PA H - i.e. a parity error has been detected in
memory - so it apparently then power-fails the system!
The incoming BUF ACLO (E52p6) goes to a PTH next to E70p8. On the bottom,
there's a trace from that PTH that goes to E66p13 - which is the inverter
shown on K2 which converts BUF ACLO H to POWER OK H. So that probably the
answer to my plaint about E70p1 being left floating: perhaps theres an etch
cut somewhere that disconnected E66p13 from E70p2, so the former can now be
driven by E52p6. I can't see one, but there's a trace from that latter PTH
that dives under E70, and I can't see it well, but it looks like it goes to
E70p2. It would be interesting to know what they did about the E70p2 -> E66p13
connection.
Noel
> does [disabling the MCLK counter via DCLO, asserted by the two
> E126 monostable chain from ACLO] happen just on power-down, or on
> power-up too? I'd need to understand how that two monostable chain
> works in both cases, which I currently don't. (I only understand
> monostables when pulses trigger them, not edges, which is a big part of
> why I don't completely understand it.)
So this was bugging me, so I hauled out my TI TTL databook and looked up the
LS123.
According to that, the 123 is triggered by the rising edge on the B
(non-inverted) input, when the A (inverted) input is low (which it will be
here; it's tied to ground). (Also by the falling edge on A when B is high,
which we can ignore.)
So I think that chain is probably triggered only on power-down, which will
produce a rising edge on P FAIL. (Power-up will produce only a falling edge
on P FAIL, once power is up and good.)
(Note that the second monostable is triggered, also on B, by the -Q output of
the first; i.e. by the 'falling' edge of the first's pulse. But see also at
the bottom, below.)
So that should happen (if I have correctly understood this, which is not
certain, I'm just a software person :-) is that some time after P FAIL goes
high - a delay set by the first 123 - the second 123 produces a pulse (of a
width set by its RC pair) - which via E52 produces an assertion pulse on DCLO.
WTF? (Not that we care in this machine's case, since i) it only happens on
power-down, and ii) it's just a pulse, so it's affect on MCLK will be very
transient; it can't cause it to stay off. My curiousity has been piqued, is
all. :-) The TM does not, after a _thorough_ search (although there are a few
mentions of power u/down, but not this), explin why, alas. (The TM for some
_other_ -11 CPU, one which contains a similar circuit might, but I'm not
_that_ curious! :-)
My _guess_ is that the intent is to reset all devices to a good idle state,
_before_ power actually goes out. (Don't ask me why it just doesn't use
INIT, though!)
The potential fly in the ointment of complete understanding is that a 123 can
_also_ produce a pulse on a rising edge at the clear input - and there is
some circuitry driving the clear input on the second 123. (The clear input on
the _first_ 123 seems to be left hanging in space - odd!) It seems to be set
off by the mysterious DGP03 signal, generated by the microcode - but the GP
table on pg. 4-21 of the TM doesn't contain an entry for '3'? Unless it has a
typo - there are two '5' entries. In which case it could be 'Toggle the HALT
flip-flop (K6)' (which I don't see on K6, unless it's E78) but yah, pulsing
DCLO will probably clear it, wherever it is!
This machine is making my head hurt.
Disconnect the bad ACLO, power it on, and see if the CLK LED comes on. if not,
then we'll have to work out why not.
Noel
When I looked at that ebay listing of "glass memory" it pointed me to another item, https://www.ebay.com/itm/265623663142 -- described as "core rope memory". Obviously it isn't -- it's conventional core RAM. Interestingly enough, it seems to be three-wire memory (no inhibit line that I can see). It looks to be in decent shape. No manufacturer marks, and "GC-6" doesn't ring any bells.
paul
> It was quite a struggle to separate those nylon connectors, is there a
> trick to it?
You mean the Mate-n-lok's? Not really; just make sure the catch is released.
What did you do about DCLO? (Oh, I think I see the answer, below.... looks
like you're relying on the pullup on K3...)
> When I powered on, the CPU LEDs did not light up.
Two of them ('0' and '1') are just bits in a special register, and thus only
do anything when the bootstrap code fondles them. When you get ODT running,
you can amuse yourself turning them off and on manually! :-)
> I did notice that the CLK LED flickered on briefly when I powered it
> off.
Interesting. Not sure exactly what we can deduce from that; but interesting.
> I put a scope probe on TP1 (p152 of the PDF), there was no activity,
> the pin remained high.
Yes; the signal there (MCLK H) is more or less the same one that drives the
'CLK' LED (MCLK L); so no big surprise there. Still, that reduces the problem
space to a small part of K1.
> The problem now is that I expect I will need to probe various pins to
> find out what is going on. But I don't have a Unibus extender and I am
> reluctant to remove the backplane. From what I can tell in the
> Technical Manual you can't install the CPU in other slots
Basically right; the backplane and CPU are designed to have it go in slot 1.
It _might_ work in other MUD slots, with some loss of functionality (e.g.
slot 2 doesn't have grant lines; MUD slots won't have the 'UNIBUS Map board
pesent' line - pin FE1, on K11, UB TO MA VIA UBMAP) but I wouldn't want to
chance it, there might be a clash.
> I am forced to tack solder probe wires to the chips, which works but is
> time consuming. Any other ways?
Sorry, I don't have any experience to suggest any; too well supplied with
extender cards, so I've never had to resort to alternatives!
> I *think* I have found something. There could be a fault in E52 (sheet
> K6, p157 of the PDF). While K6 BUS DCLO L is +5V, I am measuring K6 BUF
> DCLO H at an average 1.64V
Yeah, that's wrong. E52 is bad, and will have to be replaced.
(From the +5V on BUS DCLO, I guess you're relying on the pullup? DCLO on the
UNIBUS, with the resistor network on the M9302, should be about 3.5V - but now
I'm confused, even with the P/S connector unplugged, it should still be 3.5V
or so. Oh well, it's late, the brain is powering down... :-)
The 'unused' gate in E52 is the one that the added wires from the ACLO ECO went to;
I wonder if it was damaged by the -15V, somehow?
> logical 0 output should be 0.4V max
Which is what you should be seeing.
> I also measured K6 BUF DCLO L to be always low, suggesting it thinks
> the K6 BUF DCLO H is a logical 1.
Yup; and that definitely explains why the clock isn't running - BUF DCLO L is
clearing E41 on K1.
Anyway, you'll have to replace E52 (which will be a bit of a pain, with the 3
ECO eires tacked to it). The DS8641 is an old chip, no longer in production, so
the usual suppliers may not have it, but there are some on eBait.
Noel
Finally found time to get to this one...
> From: Rob Jarratt
> However, there is a puzzle. On the CPU I found that the track from the
> pull up resistor to E70 has been cut.
I don't know about the "pull up resistor" part, but I have several KDF11-U's,
and _all_ of them have the trace on the bottom of the card connected to pin 1
of E70 cut, in the exact same place (about 1/8" from the pin). This suggests
that it's not a local mod (as you suggest below), but an 'official' DEC ECO.
> This would suggest that E70 pin 2 is floating, which I think means that
> K2 BUF ACLO H is also floating
The input (pin 1) will be floating, but not the output (pin 2); TTL doesn't
work that way, I think. I may have this wrong, but I think open TTL inputs
float high, so BUF ACLO should be low. I looked, and I don't see any other
traces (e.g. on the top side) going to pin 1. So I'm a bit puzzled that DEC
allowed that input to float, as open inputs can lead to erratic operaton;
they're usually tied high, or to ground.
> K2 BUS ACLO L however has been patched to E52 pin 4, which is the
> output of a gate on sheet K6. Can't say I understand why.
Me neither; that's an unused (on the prints) driver in the DS8641 (center
bottom of the page) - although that gate seems to have been fully wired up
(wires to pins 4, 5 and 6) as part of the ECO.
There is an ECO list on pg. 167 of the -11/24 prints (2 pages after K14),
but I don't see an E52 in it anywhere.
The puzzle here, if E70p1 is cut, and the output is low, is why the CPU clock
isn't running. The -15V on BUS ACLO shouldn't have taken out any other
semiconductors; it's not attached to anything else.
(It will have run C6, on the lower right of the card, the wrong way, but i) I
think that's a non-polarized item - and 100V rated, per the prints, and ii) I
don't think that goes anywhere else, even if it's not.)
So what's stopping the clock from running, then?
Noel
> From: Tony Duell
> A short in FET Q15 on the bias/interface board in the PSU could do it.
> The gate of that FET is driven from an LM339 comparator the -ve supply
> of which is -15V.
Ah; I hadn't even looked at the P/S prints.
(Like I said, I'm really weak on analog: for digital, I have the advantages
that i) although I'm basically/mostly a software person, the MIT CS
department is part of the EE department, and they made sure that all the CS
people had a decent grounding in the fundamentals of digital hardware; and
ii) in my early years, I was involved in a number of actual hardware
projects, including a UNIBUS DMA network interface that tuned into an actual
product. So I'm pretty good with a digital circuit diagram, like these CPU
prints. But analog stuff is still a mostly-closed book to me! :-)
Anyway, I'm happy to let you provide the analysis of the P/S... :-)
> From: Rob Jarratt
> [Perhaps] something else on the CPU caused Q15 to fail (if indeed it
> did).
I'd guess 'unlikely' (if Q15 has failed); UNIBUS ACLO is connected, on the CPU
card, to only a single gate (on K2), and that 383 ohm pull-up (on K3), and the
1K pF cap there (the purpose of which I still don't understand, unless it's
just a smoother). Although I suppose that if that cap failed, shorted, maybe
that could have taken out Q15 somehow.
> Perhaps I should ... and disconnect ACLO, DCLO and LTC, they are all on
> the same connector
Now why didn't I think of just un-plugging that whole connector! Duhhhh! My
only concern would be leaving inputs floating...
DCLO, no problem; it has that pull-up on K3. (Ditto for ACLO, if the buffering
input gate isn't dead.) LTC, let's see... It's on K6, upper left corner. I'm
too lazy to work out what leaving that input floating will do, and, if it has
bad consequences, trace out all the places it goes (it should be connected up
to cause an interrupt, somewhere), but there's no point; the KW11 has an
'interrupt enable' that has to be set by software before it can do anything;
so at the moment it's safe to just ignore it for now, and stay with a focus on
getting the main CPU clock running. (LTC is not on the UNIBUS, so there's no
pull-up on the M9302 for it the way there is for ACLO & DCLO.)
So unplug that connector, and see if E70 (on K2, lower right corner) is OK.
(Remember, the pull-up will give it an Ok input with BUS ACLO disconnected.)
If yes, great, go check the main CPU clock.
If not, time to i) see how far the rot has spread (e.g. have other gates in
that package died - not sure what else is in there; not just looking at things
connected to the output - on pin 2), and ii) decide how to repair or
temporarily bypass. (Ditto for anything else that got taken out.) I'd be
tempted to bypass it (since I doubt you stock 8837's - although I do :-) -
ACLO handling isn't needed to get the CPU running. Tie BUF (not BUS!) ACLO to
ground, I'd say, and we can move on to look at MCLK.
> If that works then I think repair ACLO and see if anything on the CPU
> is bad or anything else that might cause a short on the ACLO signal of
> the bus.
Well, your call, but i) working ACLO isn't needed to get the CPU running -
and, in particular, to look for other problems that might be preventing it
>from running, and ii) fixing ACLO isn't guaranteed to make the CPU work.
I'd recommend 'keeping the eye on the ball', and focus on the main CPU clock,
getting ODT running, etc. The ACLO issue(s) can be cleaned up at your leisure.
Noel
> and there is some circuitry driving the clear input on the second
> 123.
Never mind this section. I mis-read the print; the clear input is connected to
an _input_ of the flop below (which is also tied high).
Noel
> From: Brent Hilpert
>> ACLO is only used to trigger a 'power-failing' interrupt; CPU
>> operation is otherwise un-affected by ACLO (so the CPU can get ready).
>> DEC P/S's carefully sequence ACLO and DCLO such that on power-down,
>> ACLO is asserted first (to allow the CPU to get ready); on power-up,
>> DCLO is de-asserted first (the later de-assertion of ACLO is the
>> signal for the CPU to start running).
> a) "ACLO is only used to trigger a 'power-failing' interrupt"
> b) "ACLO is the signal for the CPU to start running"
> Only a, or a & b?
Sorry, I tried to write only 10 words, when I should have just bitten the
bullet and written 40.
There are two different circumstances: i) AC power coming on, and ii) AC
power going off. (Sorry if you already know this next, but I'm not skipping
anything any more: DEC paid careful attention to both, as the PDP-11's were
always intended to be able to deal well with un-attended operation over an
un-expected power outage. So they had to shut down in an orderly way on ii),
and start up in an orderly way on i). Having the operator press a 'reset'
button after power-on was not an option! Of course, the software had to be
written to handle it all, and not all of it did so; e.g. UNIX V6 didn't deal
well with either, whereas RSTS-11 would go through an outage and
automagically pick up exactly where it was when power went down.)
So when I said "ACLO is only used to trigger a 'power-failing' interrupt",
the un-stated circumstance was 'when AC power goes off'.
The bit about "de-assertion of ACLO [on power-up] is the signal for the CPU
to start running" is something I hadn't known, but just picked up (it's not
anything I ever had to pay attention to before) from reading the
"Initialization" section in the "pdp11 bus handbook" - which is not (alas)
online. (Maybe I should scan, OCR and port that section; it's fairly short.)
(There _is_ a "pdp-11 UNIBUS Design Description" document online:
http://www.bitsavers.org/pdf/dec/unibus/UnibusSpec1979.pdf
but alas it doesn't have anything like the detail given in the "pdp11 bus
handbook". 2.5 there, "Initialization Section", has some text about ACLO,
DCLO and INIT (which is generated by the CPU, not the P/S), but not much.)
Here's what the "pdp11 bus handbook" says (pg. 54):
"When [the processor] senses the negation of ACLO, [which happens after the
negation of DCLO, which itself happens "5 useconds after DC power is within
specifications" - i.e. plenty of time for all logic to reset itself to a
known state, after good power is available to it all] the processor starts
its power-up sequence."
How that happens in the -11/24 I'm not sure; the -11/24 TM doesn't cover it,
and the Fonz, which we don't have documentation on, will be involved.
> Now these things may well not be a problem here; I'm just looking for
> potential failure points because we're looking for an unknown fault by
> isolating things, and it's best done without introducing new potential
> problems, or at least being aware of the potential.
Makes sense.
> ACLO exercises influence over DCLO and hence the CPU clock via those
> those monostables (we both) mentioned earlier.
Right, I had forgotten about those - it was late, and my brain was shutting
down as I was tired.
> ACLO -edge:
> ==> inverted (E70.2/K2) to +edge
> ==> triggers FF (E67/K2_PFAIL) to latch high
> ==> triggers MonoFF (E126/K6_AC_TIM)
> ==> triggers MonoFF (E126.10-5/K6)
> ==> asserting K6_BUF_DCLO_L for some period
It's not clear to me what the _point_ of that all is; I had previously
guessed that "there's a delay between the PFAIL H input .. and _the CPU_'s
assertion of DCLO - i.e. if the P/S goes bonkers and indicates ACLO, and
doesn't promptly (after a suitable short delay to allow for power-fail
action) follow it with DCLO, as it is _supposed_ to, the CPU will indicate
DCLO on its own - and do it on the bus so everbody else will freeze too."
That might still be correct - I think that perhaps that path through the
monostables only operates on power-down (but maybe I'n wrong there, I don't
really understand completely how that all works) - on power-up, PFAIL H is
going to be a falling edge - so will the two E126 monostables just ignore
that? Alas, the -11/24 TM doesn't cover this, as far as I could find.
AC TIM winds up being used on K1, on the monostable at top right, which I
think generates a bus INIT pulse, when called for by the microcode (MIB14).
No idea why they need AC TIM to clear that monostable.
> ==> which disables MCLK counter (E41/K1)
Right, but does that happen just on power-down, or on power-up too? I'd need
to understand how that two monostable chain works in both cases, which I
currently don't. (I only understand monostables when pulses trigger them, not
edges, which is a big part of why I don't completely understand it.)
> It may be that it just stops the clock temporarily: DCLO asserted resets
> E67/K2_PFAIL, clearing it to register another ACLO / P FAIL.
Could be; that's something else I don't understand completely; that flop's
clear input depends on part on DGP06, which comes out of the E46 decoder on
K1, which is again driven by the microcode. I'll have to look at the TM, and
see if it explains that.
> I thinks he's right to poke around the clock circuitry looking for
> where the clock is being inhibited.
Yup. I was hoping that if we just disconnected the busted ACLO, the clock
would spring to life, and then we could move on to the next step(s), but
maybe looking into that block in detail, e.g. to see if E41 is being reset by
DCLO, would be the best way to go.
Noel
> From: Brent Hilpert
> DCLO & ACLO behave as power-on-reset signals to the system.
Minor nit: actually, I think it's DCLO which performs that function in a lot
of places; see e.g. the latches on pg. K2 (pg. 153 of the PDF) and K7. (INIT,
usually in buffered form, is used more widely for this function, but I doubly
digress in that observation.)
As I explained, ACLO is only used to trigger a 'power-failing' interrupt; CPU
operation is otherwise un-affected by ACLO (so the CPU can get ready). DEC P/S's
carefully sequence ACLO and DCLO such that on power-down, ACLO is asserted
first (to allow the CPU to get ready); on power-up, DCLO is de-asserted first
(the later de-assertion of ACLO is the signal for the CPU to start running).
However, you make a good point with:
> If they are allowed to just float up as the power supply comes up you
> have no guarantees as to the end result ('end' meaning the state of
> things after the power supply has come up)
DEC specs state that DC power has to be up and stable 5 usec before DCLO can
be de-asserted ("pdp bus handbook", pg 53). This is precisly so that
everything is in a known state when operation commences.
So I guess I'll go back to my original suggestion: disconnect the ACLO from
the P/S (with its bogus -15V), leaving DCLO, so that it can properly set
everything to a known state on power-on, and then you can see see if E70 has
been fried, or is still working.
> Manually connecting/disconnecting bus-ACLO to GND after power-up will
> ... disable the clock.
I can't see anything in the clock circuitry on pg. K1 (pg. 152 of the PDF),
where all the clocks are generated, that looks at ACLO, or its inverted form
POWER OK, or its latched form, PFAIL (both generated in the bottom RH corner
of K2)? Did I miss something? All I can see is DCLO.
I'm too burned out right now to check for uses of ACLO/POWER-OK/PFAIL, to see
definitively what it does do; tomorrow.
Noel
> From: Brent Hilpert
> So apparently I've been looking at the wrong +5V supply (H777) because
> the rest of you are indeed looking at a different +5 supply (H7140),
> both of which are in that same 11/24 pdf document
That's because the H777 is the P/S for the BA11-L 5-1/4" box, and the H7140
is the P/S for the BA11-A 10-1/2" box - both of which are, quite reasonably,
covered in the -11/24 print set.
> I really wish when people are asking for assistance or talking about a
> schematic or circuit they would include a link/reference to exactly
> what they are looking at
But everone probably _was_ looking at the same document - just different
pages! Alas, DEC doesn't number _all_ the pages with a 'unique within the
print set' identifier. Still, one could say 'page xx of the PDF'.
Noel
> From: Rob Jarratt
> I found these two signals and ACLO is low (-15V)
'Good news, bad news'...
Bad is that something is seriously wrong there; 'allowed' values are 0v
(asserted) and +3V (un-asserted). I'm worried that the -15V will have taken
out some of the semiconductors that are 'listening' to ACLO (like E70, page
K2 of the CPU prints, lower right corner) - and possibly some of the things
that are connected to _them_.
Good news is that i) this would definitely cause a problem, so we're closing
in, and ii) even better, the machine doesn't actuallly _need_ the ACLO (or
DCLO) signal from the P/S to function properly. Just disconect them (which may
be a bit tricky; IIRC you've got a BA11-A - but you can pull the pin in the
connector shell of the power harness from the backplane, details of that here:
https://gunkies.org/wiki/DEC_power_distribution_connectors
or, worst case, just cut the yellow wire to pin 4 of the 6-pin connector). At
that point the pullups on ACLO (on the M9302 and the CPU - page K3 of the CPU
prints - that's odd, there's a pullup to +5V there, but a cap to ground; the
M9302 does indeed have the pull-up/down resistor pair on both ACLO and DCLO)
should pull ACLO high and the clock should now run (CLK LED on) - unless the
-15V killed something.
If the machine then runs, it's up to you as to whether you get the P/S
repaired so that ACLO work properly - your call. (I wonder how the -15V got
to ACLO - I suspect a solder bridge from the prior repair - but knowing the
answer is not important to getting the machine running.)
> DCLO is high and the DC ON light is illuminated
Good.
> the CPU doesn't do anything presumably because ACLO is asserted.
Yes. As long as the CLK LED is off, the machine will definitely be totally
dead. If you can get it on, ODT should run (modulo issues yet to be sorted
about the minimal functional machine - I'll post on that in a moment).
Noel
I had the H7140 PSU in my PDP 11/24 repaired a little while ago and I posted
about it here: https://robs-old-computers.com/2022/02/10/pdp-11-24-progress/
I have since had the PSU fixed again and it came back a couple of weeks ago.
When I installed it and applied power to the input, I heard a reassuring
relay click.
So I powered it on. The fans turned, but there was a crackle and I smelt
something burning. I couldn't locate the smell, there were no lights on the
CPU board, but the fans continued to turn.
I had to leave it a few days and today I went back to it to check things a
bit more carefully. All the power outputs of the PSU appear nominal.
However, the ripple seems quite high, with an amplitude of 600mV on the +5V
output: https://rjarratt.files.wordpress.com/2022/03/pin-1-5v-ripple.jpg.
The DC ON light comes on, but the M7133 CPU LEDs show no activity
whatsoever.
There is no apparent damage to the CPU or to the M7134 that was also
installed. So, I guess the component that blew up must be inside the PSU.
Presumably, whatever the part is, it is stopping the CPU working, because
previously the CPU did appear to show some activity, although of course it
could still be a failure on the CPU. I am not sure what other outputs the
CPU might depend on. There is the LTC signal for the line time clock, but I
don't know if its absence would stop the CPU working. I have not been able
to test the LTC signal as yet.
Can anyone suggest what else the CPU might need? Or is it LTC?
Regards
Rob
Its 600mV, but it is more of a spike than a ripple. Here is a trace: https://rjarratt.files.wordpress.com/2022/03/pin-1-5v-ripple.jpg
Regards
Rob
> -----Original Message-----
> From: Wayne S <wayne.sudol at hotmail.com>
> Sent: 28 March 2022 23:15
> To: rob at jarratt.me.uk; Rob Jarratt <robert.jarratt at ntlworld.com>; General
> Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
> Cc: Chris Zach <cz at alembic.crystel.com>
> Subject: Re: PDP 11/24 - A Step Backwards
>
> How bad is the ripple?
> Anyone on the list know what?s acceptable?
>
>
> Sent from my iPhone
>
> > On Mar 28, 2022, at 14:46, Rob Jarratt via cctalk <cctalk at classiccmp.org>
> wrote:
> >
> >
> >
> >> -----Original Message-----
> >> From: cctalk <cctalk-bounces at classiccmp.org> On Behalf Of Chris Zach
> >> via cctalk
> >> Sent: 28 March 2022 20:57
> >> To: cctalk at classiccmp.org
> >> Subject: Re: PDP 11/24 - A Step Backwards
> >>
> >>> I don't think the CPU is working at all. The reason being that there
> >>> is absolutely no LED activity. Including an LED that is supposed to
> >>> indicate a clock. Having hopefully eliminated all the power voltages
> >>> it left me wondering if there was a fault on the CPU or in the PSU.
> >>> Having had activity on those LEDs recently it seems most likely that
> >>> it will be the PSU, particularly as *something* in there blew up.
> >>> The only signal that I can identify that seems likely to have this
> >>> kind of effect is LTC, but I don't know enough about LTC to know if
> >>> its absence could cause the CPU board not to work at all, although I
> >>> see above that you think it unlikely. I suppose the fault could be
> >>> something I can't see on the CPU board, particularly as there do
> >>> seem to be some quite large spikes, otherwise I am not sure if there
> >>> is anything else from the PSU that could prevent the CPU getting going.
> >>
> >> I'm on a nice long train trip right now but I recently got my 11/24
> >> running again. One thing that baffled me was it would not do anything
> >> on the serial port. No ODT, no nothing.
> >>
> >> Turns out you really need to make sure the slots are filled properly.
> >> The CPU top, then the memory map, then for the next 4 boards one has
> >> to be either a properly configured MS11-PL (the 128kw board) or the
> >> memory boards specific to that type of 11/24. Or you have to put
> >> G7273's in the CD slots.
> >>
> >
> > I have been reluctant to put everything back in, in case the PSU fries
> something. And the ripple I noticed is certainly something that bothers me.
> Previously I had a burning smell from the memory board. I have since
> replaced all the electrolytics on the memory board, but I have not tried
> putting it back in the machine since. Just checking my notes, it seems I have
> had *intermittent* lack of activity on the CPU LEDs before, so it may be
> worth trying to put everything back in, although the ripple makes me
> hesitant to do so. For the record, right now I have only the M7133, M7134
> and G7273 installed.
> >
> >
> >> Next you need proper devices or G7273's in the next two slots and a
> >> proper terminator in the left sockets of the last slots and a G7273 in the
> center slots.
> >> Only then will ODT work.
> >>
> >> Another oddity is that the 5.25 inch box has +5 and +12 I think and
> >> the
> >> 10.5 has +5 and +15. There are different memory boards that work in
> >> one and not the other, or both depending on jumper settings that have
> >> to be right. Unibus drives me bonkers sometimes with the number of
> >> different voltages requires (+5, +12, +15, +20, -15, etc....) It
> >> doesn't help that the +15 and +12 are on the same pins.
> >>
> >> Plus it's possible someone screwed with some switches, make sure they
> >> are set properly (ie: default is a good start).
> >>
> >> If you're still stuck next week drop me a line and I'll fire up my
> >> 11/24 and see if I can replicate your failure.
> >>
> >>>
> >>>>
> >>>> The first will tell you that i) the CPU is basically functional,
> >>>> executing
> >>> micro-
> >>>> instructions, etc; ii) that the bus is basically functioning (for
> >>> master-slave
> >>>> cycles; DMA and interrupts will remain to be checked out); iii)
> >>>> that the console port is working. (Yes, on the KDF11-U, the console
> >>>> is on an
> >>> internal
> >>>> bus, and so in theory a machine could have the ODT 'front panel'
> >>>> working, _and_ still have a problem with the bus, but depending on
> >>>> the exact details of said problem, maybe not.)
> >>>>
> >>>> So, hook up a console, set the machine to 'halt', and power on. Is
> >>>> console ODT working? If so, congrats, you win, go to stage ii) below.
> >>>
> >>> I had a console attached. There is nothing on the console. When I
> >>> first got the machine I did get output on the console. But that was
> >>> before the PSU first failed on me, which is quite a few years ago now.
> >>>
> >>>>
> >>>> If not, you have a reduced area in which you have to investigate -
> >>>> and
> >>> you'll
> >>>> need a 'scope of some kind to make any progress. (If you don't have
> >>>> one, you're SOL. Get one.). In order i) is the CPU's internal clock
> >>>> (and thus, probably the microcode) running? (At this point you will
> >>>> need to consult
> >>> the
> >>>> "PDP-11/24 System Technical Manual", EK-11024-TM.) If so, is it
> >>>> trying to
> >>> talk
> >>>> to the console's registers? (See Section 4.6 of the TM, "Internal
> >>>> Address
> >>>> Decode".) If so, is the UART working properly? (4.7 of the TM,
> >>>> "Serial
> >>> Line
> >>>> Units".)
> >>>>
> >>>> If so, console ODT is running, you're now at stage ii): you can see
> >>>> if the
> >>> CPU
> >>>> will run. Deposit a 0777 ('BR .') in a likely location (I usually
> >>>> use
> >>>> 0100 or 01000); read it back to make sure the write succeeded. (If
> >>>> not,
> >>> likely
> >>>> either the UNIBUS or the main memory has a problem.) Start the
> >>>> machine; the 'Run' light should come on - if you're lucky!
> >>>>
> >>>> Depending on which bin you wound up in, further assistance s
> available.
> >>> :-)
> >>>>
> >>>> Noel
> >>>
> >
> From: Brent Hilpert
> But the LED and CPU clock are not driven directly by that RC oscillator
> - there's a bunch of logic in-between the oscillator and the LED / CPU
> clock.
Oh, sure; it was late (for me; the dog woke me up at AM today :-), and it had
taken me a while to get even that far (find the freakin' thing), so I just
wanted to pass the ball forward and crash!
I saw the "STOP OSC H" signal feeding into the production of "PRE OSC L", but
couldn't fully work out all the things that fed into that - and it now looks
like that's not an important thing anyway, "MCLK H" is the one to look at.
> [RC clock] => K1 OSC H/L
> --> [4-bit counter w parallel load] => K1 MCLK H/L
> --> LED
It seems to me that the LED, being driven directly by MCLK L, should be
flashing at the basic clock rate (i.e. dim to the eye) - so if it's totally
off, MCLK L must not be running. So that's thing absolutely numero uno to
investigate.
> --> [driver] => K1 CHIP CLK H (fonz CPU clock)
Yeah; the Fonz also gets "MCLK L" on pin 19, though - not sure what that's
for. Eh, not important at the moment.
> The 4-bit counter looks to be generating some additional phases
Yeah, section 4.2 "Timimg" of the -11/24 TM talks about all the various
clocks in some detail.
> but it's also controlled by a bunch of other signals. One of those
> signals is K6 BUF DCLO L which can hold the counter in reset, i.e.
> disable the Master/CPU clock (and LED). K6 BUF DCLO L is derived
> on-board from K2 P FAIL H
Huh? BUF DCLO L is just BUS DCLO L, run through that DS8641 bus transceiver.
But yes, because DCLO can stop the clock, checking ACLO and DCLO is priority
numero uno in the debugging process, now. (Contrary to my previous fear, the
CPU might be OK, and it might just be a power supply issue.)
> which is derived from K2 BUS ACLO L
I haven't bothered to check to see where BUF ACLO L (generated on K2) goes,
but I assume it's used in power-fail trapping stuff. (ISTR that PDP-11 PS's
sequence ACLO before DCLO, to allow power-fail trapping, before the machine is
frozen as DC power actually goes low.) Likewise, not important at the moment.
> which is input from BF1-in-funky-hex-box which I presume is a bus
> connector pin.
Yes; the ID ("BF2") is an indicator to that.
> Even if ACLO is good, there's a whack of logic on the CPU board -
> including two monostables - just to get from ACLO to DCLO
The import of those two monostables isn't completely clear to me. However,
notice that the output is fed through the DS8641 bus transceiver to _drive_
BUS DCLO; my _guess_ is that there's a delay between the PFAIL H input (which
comes from BUS ACLO L) and _the CPU_'s assertion of DCLO - i.e. if the P/S
goes bonkers and indicates ACLO, and doesn't promptly (after a suitable short
delay to allow for power-fail action) follow it with DCLO, as it is
_supposed_ to, the CPU will indicate DCLO on its own - and do it on the bus
so everbody else will freeze too.
Anyway, I think we've got as far as we can until ACLO and DCLO are checked.
I'm upgrading the CHWiki KDF11-U page to cover the stuff that's not in the
CPU chapter of the -11/24 TM, like the meaning of those on-board LED's, etc.
Noel
> From: Rob Jarratt
> today I went back to it to check things a bit more carefully. All the
> power outputs of the PSU appear nominal.
> ...
> Presumably, whatever the part is, it is stopping the CPU working,
> because previously the CPU did appear to show some activity, although
> of course it could still be a failure on the CPU. I am not sure what
> other outputs the CPU might depend on. There is the LTC signal for the
> line time clock, but I don't know if its absence would stop the CPU
> working. I have not been able to test the LTC signal as yet.
> Can anyone suggest what else the CPU might need? Or is it LTC?
I'm going to start with some meta-comments, and then add some practical
suggestions for how to proceed.
Reading this, I'm guessing that you're a software person, right? Not that
there's anything wrong with that (_I_'m basically a sofware engineer), but if
one is going to collect and run (which inevitably means maintain/repair - it
was ever thus, including BITD) vintage computers, you need to have mildly
decent hardware skills. Yes, to some degree, one can lay this off on others
(as has been done here with the power supply - something I'd do myself, as my
analog skills are not very good), but I think developing some decent digital
hardware understanding would really help.
For instance, take your question about the LTC. To some degree, a complete,
entirely accurate answer is dependent on the details of the software
(bootstrap and/or OS). However, knowing how the LTC works, what the low-level
details are of what the CPU hardware does with it, etc would tell you whether
it is a cost-effective (in terms of overall 'getting the hardware working'
project) thing to spend time on looking at, to begin with.
(Parenthetical observation: I reckon that debugging _any_ issue, hardware
_or_ software, is a process of 'what's the _cheapest_ [easiest, quickest,
etc] test I can do that will produce the _maximal_ reduction in the area that
the bug could be in. Rinse, repeat, until you've tracked the problem to its
lair.)
(You may discover, once you get the machine mostly working, that the LTC
_specifically_ isn't working - at which point you can dive into it in detail.
But until then, I'd ignore it. It's a relatively small aount of stuff, and the
chance of a problem in there is small. And even if it's broken, the likely
effects are small. There are better things to look at - below. Having a clear
understanding of the machine's major functional units, and how they interact,
would have made that clear.)
So, in addition that that overview of the major functional units, you
definitely need to know how the QBUS works (read the QBUS chapter in the
"Microcomputer Products Handbook" or the "Microcomputer Processors"
books). (Yes, I know, the -11/24 is a UNIBUS machine, but the two busses
differ only in extremely minor details; if you fully understand one, you can
learn the other in half an hour. And the -11/24's CPU is a KDF11 CPU, and uses
the microcode ODT 'front panel' of the QBUS CPUs.)
Having said that, and starting with the "All the power outputs of the PSU
appear nominal" (which rules out a large area), this is the process I'd
follow to reduce the area the problem is in as quickly as possible. (And
maybe I should transform this into a 'fault analysis of QBUS (and some
UNIBUS) PDP-11 systems' on the CHWiki.)
You need to see if the CPU is _basically working. Two stages to that: i) is
the ODT 'front panel' (in microcode) working, ii) is the CPU basically
functional - i.e. can it fetch and execute instructions. Answers to those
will greatly reduce the area in which the problem (if there's _only_ one - a
possibility one must keep in mind).
The first will tell you that i) the CPU is basically functional, executing
micro-instructions, etc; ii) that the bus is basically functioning (for
master-slave cycles; DMA and interrupts will remain to be checked out); iii)
that the console port is working. (Yes, on the KDF11-U, the console is on an
internal bus, and so in theory a machine could have the ODT 'front panel'
working, _and_ still have a problem with the bus, but depending on the exact
details of said problem, maybe not.)
So, hook up a console, set the machine to 'halt', and power on. Is console ODT
working? If so, congrats, you win, go to stage ii) below.
If not, you have a reduced area in which you have to investigate - and you'll
need a 'scope of some kind to make any progress. (If you don't have one,
you're SOL. Get one.). In order i) is the CPU's internal clock (and thus,
probably the microcode) running? (At this point you will need to consult the
"PDP-11/24 System Technical Manual", EK-11024-TM.) If so, is it trying to
talk to the console's registers? (See Section 4.6 of the TM, "Internal
Address Decode".) If so, is the UART working properly? (4.7 of the TM,
"Serial Line Units".)
If so, console ODT is running, you're now at stage ii): you can see if the
CPU will run. Deposit a 0777 ('BR .') in a likely location (I usually use
0100 or 01000); read it back to make sure the write succeeded. (If not,
likely either the UNIBUS or the main memory has a problem.) Start the
machine; the 'Run' light should come on - if you're lucky!
Depending on which bin you wound up in, further assistance s available. :-)
Noel
> From: "Rob Jarratt"
> Thanks for the lengthy reply.
Glad to help - or try to.
> As an aside I have also been trying to find a fault on a Pro 350 which
> uses the same CPU chipset. I have a pinout but no datasheet.
There doesn't seem to be as lot on the F-11 set. I looked in the DEC
semiconductor handbook, and it's not there - although perhaps it
had been dropped by the one I looked at (which was mostly uVAX stuff)
as obsolete?
If you look in the KDF11-A and KDF11-U Tech Manuals, there is a chapter on
the F-11 chip set, as used in those cards, and that's better than nothing -
it talks a fair amount about the low level details of how the various chips
operate and interact, etc.
> I don't think the CPU is working at all. The reason being that there is
> absolutely no LED activity. Including an LED that is supposed to indicate
> a clock.
Looking at the KDF11-U prints, I finally found that LED (it's pretty low
level - I was worried that it might be a bit in a register, and driven by
software, but it's not, it's actually driven directly by the the CPU's
internal clock signal; it's on page K1 of the prints, 'Clock, State Decode',
in the very upper left corner). (The source of the CPU's internal clock is
just an RC circuit, in the lower middle of that page, and the trim pot that's
part of it - along the upper edge of the board - can be adjusted to set the
clock speed 'properly', per the note at the back of the prints on the page
which lists the configuration switches. The 2MHz crystal along the upper edge
drives the baud rate generator.)
> Having hopefully eliminated all the power voltages it left me wondering
> if there was a fault on the CPU or in the PSU.
If ODT isn't running, the problem is almost certainly in one of those two
areas.
> Having had activity on those LEDs recently it seems most likely that it
> will be the PSU, particularly as *something* in there blew up.
I'm not so sure. Those boards mostly just want +5V; looking a bit more, the
CPU chips do seem to use +12V. The RS232 drivers will use +/-12V.
I'm afraid that if i) it used to show activity, but no longer does so, and
ii) the main voltages (+5V, +12V) look good, something on the CPU card has
failed. But it will take a bit of digging to i) verify that, and ii) identify
the fault.
> The only signal that I can identify that seems likely to have this kind
> of effect is LTC, but I don't know enough about LTC to know if its
> absence could cause the CPU board not to work at all, although I see
> above that you think it unlikely.
I have yet to trace how the LTC signal is used in the KDF11-U, but on the
KDF11-A, it not being there is a total NOP. (In fact, in the BA11-N/S type
mounting boxes, there's a 'Clock Enable' switch on the front panel which turns
the LTC signal off - and the machine runs fine with it off - except for the
TOD clock not ticking.) That clock signal - totally different from the main
CPU clock - is only used as an input to what is in effect a peripheral.
> I had a console attached. There is nothing on the console. When I first
> got the machine I did get output on the console.
Not a good sign, alas.
If you have a scope of some kind, and want to keep poking, I'd recommend that
you start by seeing if the clock is running, and move forward from there. The
KDF11-U prints are online, as is the KDF11-U Tech Manual. Skim the chapter on
the CPU (4, I think), and then grovel around in the prints for a bit. Don't
try to totally understand it all, just skim through it, so you know roughly
where most things are.
Noel
On 3/28/22 21:55, Jon Elson wrote:
> On 3/28/22 17:22, Rob Jarratt via cctalk wrote:
>> Its 600mV, but it is more of a spike than a ripple.
>>
> That's probably not real.? It looks like noise pickup from
> the probe ground lead.? Try disconnecting the probe tip
> and see if you still get similar signals.? I have seen
> similar noise lots of times when measuring things with
> switching power supplies.? The high frequency content is
> pretty unlikely to be actually there on the power rails,
> with a bunch of decoupling caps all over the boards.
>
> Jon
>
Without getting political I was saddened to hear of the destruction of the
Club 8-Bit museum in Mariupol, Ukraine. One can only hope that D.
Cherepanov can rebuild his museum someday keeping classic computing in that
part of the world alive.
Murray--
Hi,
Digital
Networks & Communications Buyer's Guide
1987 April-June
Also some DEC Letterprinter 210 and LA50 Printer manuals, ask for a list.
For postage from Toronto Canada.
--Toby
Ethernet invented in 1973-74 at Xerox PARC in Palo Alto, CA, evolved over
many years.
This April 13th Webinar will trace the history and development of Ethernet
as a 10 Mb/s product up through the release of the DIX (DEC-Intel-Xerox)
spec in 1980. This was the starting point for the ongoing IEEE 802.3
Standard activities. Speakers include Gorden Bell, Dave Liddle, Bob Metcalfe
and seven other pioneers who were there for the transition.
More detail at <https://r6.ieee.org/sv-techhistory/?p=1030> SVTHC website
Register
<https://www.eventbrite.com/e/ethernets-emergence-from-xerox-parc-1975-1980-
tickets-301085664327>
Tom
Hi All
????? I did find some RX50 images of the MicroRSX distribution.
???? So I fired up my DEC Celebris FX. It runs W95 and has a 3.5 inch
floppy, a real RX33 5.25 inch drive and a CD-R.
?? Its accessible on my network so getting files onto it is not a problem.
??? So install putR.com , and transfer the image files.
? ? Huh! putR says the RX50 disk is write protected. Its not and the
drive works normally with the disk from the MS DOS prompt.
? ?? So much for putR writes RX50's on RX33!
??? Rod
A friend who used to work as a software trainer for DEC sent me the following link (https://m.youtube.com/watch?v=uIqlMfSCs0E), which points to an hour-and-a-half-long YouTube video from June 2021 about the history of DEC. It is a Zoom presentation from the Maynard Public Library done by a local newspaperman. It is fairly general, but was attended by a number of former employees, some of whom made comments.
Here's one for the memory banks. I have a number of TRS-80's.
Back when they first came out I bought a couple of the FreHD
Hard Disk Emulators made by Fred Vecoven. They worked great
and made life a lot easier. Then, I had reason to put everything
away for a long rest. I just pulled them out and set them up
again. Neither of them does anything. As a matter of fact, in
my 4P they even keep the system from booting from floppies.
Anybody else run into something like this? Is there something
that would go dead if they sat idle for several years? I checked
the CR2032 batteries and they are still alive so it's not like
they ran out of power or anything. Any hints?
bill
Looking for a couple of MAN-3A (single character, seven-segment red LED
display) to restore a '70's pocket calculator.
One digit is missing a segment. I had another 3A in my LED drawer - and
IT has a different bad segment... aargh.
No luck searching the usual places online.
Can anyone help?
thanks.
> From: Steven Malikoff
> I have finally got around to scanning the print set for the DEC ME11-L
> memory expansion unit
Ah, thanks for that. The prints for the boards are available, in the
PDP-11/05 Engineering Drawings (on pp. 115-137), but the MF11-L backplane was
previously missing. (The -11/05 generally mounts MM11-L sets in the main CPU
backplane, so the MF11-L backplane is not included in the -11/05 prints.) It
is the non-parity MF11-L backplane (DEC part number 54-09959), not the parity
one (part number 54-10331), though. (My theory is that the non-parity version
can be upgraded to parity with an etch cut, and some added wires, FWIW.)
Noel
I have finally got around to scanning the print set for the DEC ME11-L memory expansion unit
and you can find it at
https://archive.org/details/dec-me-11-l-core-memory-system-engineering-draw…
The quality is acceptable given that the office supplies shop where I (DIY) scanned them on an A3
scanner only allowed output as JPEG or PDF (undoubtedly wrapped as JPEGs inside) so I thought there
was no point degrading any more than necessary with editing the JPEGs to another format just to
re-save them. I just bundled the raw scanned pages as-is and it looks fine.
There's also some miscellaneous fragments for the M7050, M715 and M840 module drawings which came
with the ME11 set.
Steve.
I cannot find a datasheet by any of the numbers silkscreened on these ICs.
Could these be proprietary IBM P/N numbers?
https://www.dropbox.com/s/f6rvemx9ldbbv5x/EPROMS1.jpg?dl=0
No need for a Dropbox account, close the login pop up and you can view the
image.
Thanks
Don Resor
I came across a reference to a cctalk message from 9 September 2006 and
would like to read the rest of the thread with the subject "PDP-8m Console
Switch Problems - fixed!".
Unfortunately it appears that the cctalk archive does not go back to 2006.
Is there some place with the complete cctalk archive or at least back to
Sept 2006?
I have also been trying to search the cctalk archive, but short of
downloading every month and unzip it, there appears to be no easy way of
searching. What do experienced cctalk members do?
Thanks
Tom Hunter
In case anyone else has been looking some of these, there is a listing for
multiple tubes-of-11 on eBay at a moderate price:
https://www.ebay.com/itm/123710245814
QTY-11 PCS. AMI SEMICONDUCTOR DC319 C04090 Integrated Circuit - (UIC
40378901)
It's documented in the DEC Semiconductor Data Book, Volume 1 (1987), pages
3-27 through 3-41:
http://bitsavers.org/pdf/dec/semiconductor/
-----
Those look like "stripline" RF/microwave packages. PCBs will have cutouts
for the package body, so that the leads can be soldered flat (no bends)
directly onto impedance-controlled leads on the board.
On Tue, Mar 22, 2022 at 6:17 PM Oldcompu via cctech <cctech at classiccmp.org>
wrote:
> Anybody know what these are? Maybe RF related? Found on a box of computer
> ships.
>
> https://share.icloud.com/photos/0294pRVHPFQMShUZic2vFvneg
>
>
>
NEW CONTRIBUTION TO US "CALL-A-COMPUTER"? PILLSBURY? TIMESHARE...? ?WHAT? SYSTEM WAS? THIS? RUN ON ?? ? ?IT IS A? BIG 3 INCH 3 RING AS NEW TIMESHARE MANUAL.? THANKS? ED#? ? SMECC MUSEUM