Wai-Sun,
I've been trying to get hold of you, but have not gotten any response (it's possible that your mail may have bounced due to our spam filtering).
I have received the Data I/O conductive pad that you wanted. Do you still need it?
If your return mail is bouncing, try my backup address of kc7gr (at) qsl dot net.
Thanks much.
-=-=-=-=-=-=-=-=-=-=-=-
Bruce Lane, Owner & Head Hardware Heavy,
Blue Feather Technologies -- http://www.bluefeathertech.com
kyrrin (at) bluefeathertech do/t c=o=m
"If Salvador Dali had owned a computer, would it have been equipped with surreal ports?"
Allison wrote:
> I'd consider that the 8008 is getting bad input data from a bad scan line
> which it will output or that it's outputing correctly and the data is
> corrupted after output due to bad latch or other hardware.
>
> One likely possibility is not ram as a prblem but a I/O port that has a
> stuck bit. Or the control for that port is stuck. This is most likely
> if the basic fuctions are there (8008 program runs) but some parts of
> the data used to control the 11/34 or display it's status is not correct.
>
> FYI the 8008 can be single stepped if you pull the "READY" line each
> cycle and just look at the bus with a simple logic probe or clip.
Thanks for the good input Allison!
I hooked a logic analyzer to the address lines A0-A7 on one of the program
ROMs, and simply sampled the data without any trigger. With the display in
octal mode, I can see the executed address sequence. The 8008 executes the
main loop and calls SHFT1 *and* returns to the correct PC. That means that
the ROM, RAM (to store the return address) and associated circuits must be OK.
Thanks for the tip, but I hope (after studying the LA usage) that cycle stepping
will not be needed. Now that I have the LA set up (first time use!), and checked
the program execution, I will refocus on the scan matrix. With the 'scope, I had 2
time traces at best, with the LA I can have 16, thus *all* signals for the keyboard
and the display (because scan keyboard drive == common display drive).
I will post any progress!
- Henk, PA8PDP.
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Thank you for your cooperation.
I found one of the rom images I put up was a bad prom. Another one read
consistently but didn't match two other sources. The images have been
replaced. Affected images : 752A9, 248F1, 616F1. I replaced them after
getting multiple other images and comparing, so I'm confident the ones up
now are all correct.
I'd like to post source listings for the boot programs. Anyone got a program
to re-arrange the bits correctly, then disassemble?
Jay
>
>Subject: RE: help - 11/34 console problem - first measurement results
> From: "Gooijen, Henk" <henk.gooijen at oce.com>
> Date: Sun, 06 Nov 2005 09:20:27 +0100
> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
>
>Content-Transfer-Encoding: quoted-printable
>
>Tony wrote:
>
>> Interesting, the LSB is being lost somewhere (that would explain why
>> 1 does nothing, why 5 behaves as 4, etc).
>>
>> What sort of RAM is on this board (I can't be bothered to find the
>> prints tonight ;-)), do you know if it's good. I've found old SRAM
>> to be notoriously unreliable.
> =
>
>Interesting, I had not thought of that, may be a stuck bit.
>I must have a better look at the program code listing. Checking out
>the RAM is a bit difficult. It consists of two 4-bit chips with
>separate data IN and data OUT pins, type 86586 (?).
>If the 8008 uses the RAM for storage of variables, I guess that I can
>safely say that the RAM (plus associated circuitry to read/write) must
>be OK.
>
>> Since I have a logic analyser 'to hand', I would start looking at those
>> 3 inputs to the '47. Where do they come from on the M7859? An output
>> port on the 8008? Do we know that port is latching correctly? Or more
>> likely, the 8008 is writing the wrong values to it.
> =
I'd consider that the 8008 is getting bad input data from a bad scan line
which it will output or that it's outputing correctly and the data is
corrupted after output due to bad latch or other hardware.
>Page KY-4 has all the decode logic. There is a second post to this list
>on its way, posted Friday morning ... it's now Sunday morning ...
>The signal KY4 READ INPUT 5L from the 74154 is used on page KY-3 to
>enable 8093 AND gates to read the scan matrix lines. =
>
>The signal KY4 LD REG 0H via a 7404 from the 74154 is used on page KY-6
>to enable a 74175 latch of which the outputs drive the scan matrix.
>Likewise, KY4 LD REG 1H drives the 3 NUM lines for the 7447.
> =
>
>Before I go on writing long stories here, I think it is best to wait
>for the e-mail from last Friday to appear here.
>Thanks for working with me Tony, it helps keeping focussed ...
> =
>
>- Henk, PA8PDP.
One likely possibility is not ram as a prblem but a I/O port that has a
stuck bit. Or the control for that port is stuck. This is most likely
if the basic fuctions are there (8008 program runs) but some parts of
the data used to control the 11/34 or display it's status is not correct.
FYI the 8008 can be single stepped if you pull the "READY" line each
cycle and just look at the bus with a simple logic probe or clip.
Allison
Forwarded:
> From: William Donzelli [mailto:aw288 at osfn.org]
> Sent: Thursday, November 03, 2005 8:01 AM
> To: Don Reaves W5OR
> Subject: RE: National SW-54 bites the big one
>
> > What should I do with my PDP-11/24, PDP-11/03-L, and RL02 bits?
> > Send me a buyer/trader as I need to get them off my carport
> before winter.
> > No racks, no interconnect cables, just the units as they
> were removed from
> > the rack years ago.
> >
> > If I must I'll put them on 'bay, as a precursor to carting
> them to the
> > smelter.
>
> Can I post this to another list?
On Nov 1 2005, 16:09, Jules Richardson wrote:
> Chuck Guzis wrote:
> > This may be appropriate for another list, but it seems to me that
there's
> > plenty of applicable knowledge here.
> >
> > Right now, we're using an older Compaq Deskpro P3-600 box as our
incoming
> > Linux server. Basically, it connects with the DSL modem and
contains IP
> > masquerading, DNS caching, firewall and fetchmail/procmail/qmail
tasks
> > (SpamAssassin included). It runs 24x7 with no problem, as it has
for the
> > last 5 or 6 years. Built like a tank.
>
> Would an offering from one of the various UNIX vendors be a
possibility?
> Sun / SGI / HP or something? I'm thinking that getting away from any
> kind of Intel CPU would be a good place to start, plus of course you
> don't need any kind of framebuffer then either (unlike a PC) and can
> just use a serial console on the (very rare) occassions when you'd
need
> to be physically at the machine.
>
> Cut memory to bare minimum too as that's probably a major culprit of
> current draw.
>
> If the machine's not doing any logging to local disk then you can
> eliminate the hard drive too
I disagree with a few points there. Firstly, SpamAssassin is very
resource-hungry. It works best with a fair amount of memory. It also
tends to be very slow - I've seen it take 4-10 seconds *per message* on
a slow machine. That might not matter on a machine handling a very
small amount of mail, of course.
Then you can't really have your incoming-mail handler run diskless,
because if you do, something else will have to run 24/7 to store the
mail. Better to have just one machine. But find a modern slow drive
rather than an old slow drive; slow drives use less power than fast
ones, but modern ones use less than older ones. Laptop drives are
often pretty low-power.
However, many of the Sun/SGI/HP type of machine might run more quietly
since they don't need big fans for CPU and PSU. They also don't need a
framebuffer as Jules said, *and* no keyboard. But they will tend to be
slow, and you'll have fun trying to doing all the IP masquerading
firewally stuff on anything but Linux or BSD, which is going to be more
trouble than it's worth on most of the above.
FWIW, I think Tim's suggestion (mini-ITX) is amongst the best.
--
Pete Peter Turnbull
Network Manager
University of York
Tony wrote:
> Interesting, the LSB is being lost somewhere (that would explain why
> 1 does nothing, why 5 behaves as 4, etc).
>
> What sort of RAM is on this board (I can't be bothered to find the
> prints tonight ;-)), do you know if it's good. I've found old SRAM
> to be notoriously unreliable.
Interesting, I had not thought of that, may be a stuck bit.
I must have a better look at the program code listing. Checking out
the RAM is a bit difficult. It consists of two 4-bit chips with
separate data IN and data OUT pins, type 86586 (?).
If the 8008 uses the RAM for storage of variables, I guess that I can
safely say that the RAM (plus associated circuitry to read/write) must
be OK.
> Since I have a logic analyser 'to hand', I would start looking at those
> 3 inputs to the '47. Where do they come from on the M7859? An output
> port on the 8008? Do we know that port is latching correctly? Or more
> likely, the 8008 is writing the wrong values to it.
Page KY-4 has all the decode logic. There is a second post to this list
on its way, posted Friday morning ... it's now Sunday morning ...
The signal KY4 READ INPUT 5L from the 74154 is used on page KY-3 to
enable 8093 AND gates to read the scan matrix lines.
The signal KY4 LD REG 0H via a 7404 from the 74154 is used on page KY-6
to enable a 74175 latch of which the outputs drive the scan matrix.
Likewise, KY4 LD REG 1H drives the 3 NUM lines for the 7447.
Before I go on writing long stories here, I think it is best to wait
for the e-mail from last Friday to appear here.
Thanks for working with me Tony, it helps keeping focussed ...
- Henk, PA8PDP.
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>
>Subject: Re: FPGA VAX update, now DIY TTL computers
> From: woodelf <bfranchuk at jetnet.ab.ca>
> Date: Fri, 04 Nov 2005 10:19:25 -0700
> To: General Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
>
>Allison wrote:
>
>>There is also the matter of fault tolerence. Parity doen't provide that
>>unless the OS can map out the offending bank and the offending bank
>>isn't in a critical location. ECC can keep you going if you have a
>>stuck bit but it's up to the user/maintence to fix asap.
>>
>>
>>
>But does any software even consider being able to be rolled back from a
>check point nowdays?
>With a well designed virtual memory system ( no gui stuff I guess ) a
>process that takes several
>days? or more to process needs to interuptable and saveable.
I think VMS and a few of the real OSs do but PCs nah.
Allison
I won this disk in an auction:
"IBM Personal Computer Hardware Reference Library | Diagnostics | v2.02"
...only to find that it had been reformatted and filled with someone's Turbo C
homework assignments (argh!). Does anyone have this diskette image available
for download? I'd like to restore it to the original diskette to make it whole
again.
--
Jim Leonard (trixter at oldskool.org) http://www.oldskool.org/
Want to help an ambitious games project? http://www.mobygames.com/
Or check out some trippy MindCandy at http://www.mindcandydvd.com/
Tony wrote:
> This suggests it is correctly counting the digits you enter (or shifting
> them into a register), but is not displaying them correctly. And it is
> only updating the bottom 8 bits.
> As you probably know, the console is controlled by an 8008
> microprocessor. Of course it's an 8 bit device. Maybe some 'carry' is not
> working correctly.
>
> What does it do if you press 4 repeatedly? Does it flash the bottom 3 or
> bottom 2 digits? If it's only updating the bottom 8 bits, you see, then
> only 2 digits will flash from 0.
Indeed, pressing the "4" only flashes the last two digits!
How did you know that ?!
Anyway, here are the results of this evening. I write down everything,
so you can read the good and the bad things I found ...
First the BA11K box configuration.
slot position board(s)
--------------------------------
1 A - F M8266
2 A - F M8265
3 C - D G7273
4 A-B C-F M9312,M7859
5 C - D G7273
6 C - D G7273
7 C - D G7273
8 C - D G7273
9 A-B C-D M9302,G7273
Next, the response on the display from the keypad. I always
started with pressing "CLR", then repeatedly the same key.
The rightmost (lsb) display is called "A", the one next to it
is called "B", the leftmost (msb) display is called "F".
button display reaction (1st time, 2nd, 3rd, etc)
--------------------------------------------------------
0 nothing to see
1 nothing to see
2 A , B , C , C , C, etc.
3 A , B , C , C , C, etc.
4 A , B , B , B , B, etc. (as Tony predicted!)
5 A , B , B , B , B, etc.
6 A , B , C , C , C, etc.
7 nothing to see
LSR SR DISP LED goes on
The LAD, DIS AD, EXAM, and DEP keys seems to give no response.
However, if I pressed LSR, and the SR DISP LED is on, pressing
any key will turn of that LED. Even the CNTRL key ...!
The printset was my lead, so I started from the beginning: the
flat cable from the console to the M7859 module.
All 20 wires check out OK, so one problem source eliminated.
3rd page of the printset.
I checked the +5V and GND faston, and measured a clean 5.15 V.
4th page of the printset.
Here are all keypad switches and the console LEDs connected to
the flat cable. The switches are grouped connected to NAND
gates (8881), and 4 gates are stobed by a signal "READ x H",
where "x" is 1,2,3,4,5. They form a scanned matrix as follows:
signal | J1 #6 J1 #7 J1 #8 J1 #9
---------+---------------------------------------
READ 1 H | START BOOT CONT HLT/SS
READ 2 H | CNTRL 3 6 DEP
READ 3 H | INIT 2 5 EXAM
READ 4 H | 0 1 4 7
READ 5 H | CLR LSR LAD DIS AD
The "READ x H" signal is derived from the pins 18 (READ 1 H) thru
pin 13 (READ 5 H) on connector J1, via 7404 inverters, and they
all have the following wave form:
<---- 22 msec ---->
_____ _____________________
| | |
| | |
|____| |__
--> <---
4 ms
I didn't check the timing relation between the "READ x H" signals.
The signals on the combined output of the 8881's have the following
wave form:
[1] [2] [3] [4] [5]
________ __ __ __ __ __________
| | | | | | | | | |
| | | | | | | | | |
|_____| |_____| |_____| |_____| |_____|
The number between the square brackets indicates the "READ x H"
signal. So when "BOOT" is pressed the low signal during the time
interval [1] goes logic high. Likewise, when I press the EXAM key
time interval [3] goes logic high.
So, keypad scanning looks OK to me, as the X-Y matrix works fine.
5th page of the printset.
Pin 19 of the connector J1 carries 5,04 V. That's OK.
This page shows the six 7-segment displays with the 7447 decoder,
the mentioned 7404 inverters for the scanning matrix signal, and
the "DRIVE xL" which are also derived from connector J1, pins 18
thru 13, via a buffer 7417.
Since "READ x H" is OK, I assume that "DRIVE x L" is also OK ...
it must be, otherwise the six 7-segment displays would not be lit !
Last 3 signals are the display values (3-bit) to the 7447 input
A, B, and C. On connector J1 pins 12, 11, and 10 respectively.
As always, the last thing to check should have been the first!
These 3 signals are continously 0 V. That explains why the display
always shows "000000". I can see a short positive pulse when a key
of the keypad is pressed.
This leads me to the following (early) conclusions.
1) the keypad is scanned. All "X" signals of the matrix (READ x H)
are OK, and all "Y" signals of the matrix (the 8881 outputs) are
all valid, and give the correct information when a key is pressed.
2) When a key is pressed it is momentarily shown on the display, but
then the value returns to all zero. I can not see the value, so
it could be any garbage ...
6th page of the printset.
This shows the component layout of the M7859 module.
Noteworthy is the connector J1, top left. This is the pinning when
viewed at the component side of the module:
________________________________________
| #19 . . . . . . . . #1 card edge
| #20 . . . . . . . . #2
|
|
card edge
Further, from the diagrams (up till now) I see the the following
pins on J1 (console) are connected to these pins on J1 (M7859).
J1 ---> J1
(console) (M7859)
-------------------------------------------------
20 A GND
19 B +5V
18 C SCAN 1 L (READ/DRIVE 1)
17 D SCAN 2 L (READ/DRIVE 2)
16 E SCAN 3 L (READ/DRIVE 3)
15 F SCAN 4 L (READ/DRIVE 4)
14 H SCAN 5 L (READ/DRIVE 5)
13 J SCAN 6 L (READ/DRIVE 6)
12 K NUM 1 H (A input 7447)
11 L NUM 2 H (B input 7447)
10 M NUM 3 H (C input 7447)
Tomorrow I will dive into the diagram of the M7859 ...
Any hints or comments on this scribbling are welcome !
- Henk.
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