Jim Battle wrote:
That's not
the first time you've mentioned that, so now I have to ask
you: What's the #1 most glaring misdesign you can remember about the
5150 or 5160?
I never studied the 5150 schematics, although I once designed an ISA
plug in card containing a 68020, DRAM, and three ASICs. We had no ISA
specs to design off of, so I just looked at the bus interface part of te
PC design.
When I read the above, I read it as "I didn't like the design of the
5150 so I created my own computer to stick in an ISA slot" :-)
Two things come to mind, one of which was recently
mentioned. The
interrupt structure was poor -- using edge triggered interrupts prevents
sharing an interrupt line. As recall the choice of edge or level
sensitive interrupts is a matter of software (programming a control
register in the interrupt controller chip). There was no cost
associated with doing it one way or the other. Someone just decided
incorrectly, and once the convention was set, it couldn't be undone.
What could have been a reason *for* using edge-triggered interrupts?
A friend wrote a program that turned off that DMA
channel on purpose,
but made sure his program would touch every row in the DRAM frequently
enough that his program would keep running. However, if anyone tried to
halt the program to capture the memory image so they could reverse
engineer his game, they'd get corrupted memory.
That's dedication! I wrote a memory-copy routine that used DMA but I
could never get it reliable (when refresh is off you only have so much
time and rarely were you copying something that touched every row, so
the copy would work and then the *rest* of the DRAM was gone).
--
Jim Leonard (trixter at
oldskool.org)
http://www.oldskool.org/
Help our electronic games project:
http://www.mobygames.com/
Or check out some trippy MindCandy at
http://www.mindcandydvd.com/
A child borne of the home computer wars:
http://trixter.wordpress.com/