test-drb February 2017

test-drb@ccmp.vtda.org

153 participants
189 discussions

Information Request: unidentified HP 9825T instructions

by pete＠petelancashire.com

I agree quite a unique bit of code On Feb 13, 2017 4:07 PM, "Noel Chiappa" <jnc at mercury.lcs.mit.edu> wrote: > From: Tony Duell > My first thought, and it's probably wrong Apparently not... :-) > these instrucitons (which differ by one bit, so might be > setting/reseting something) are NOPs to the CPU, but are interpretted > by the memory mapping hardware Ooh, very clever/cool. Noel

7 years, 3 months

PDP 11 Line Time Clock (LW11L) M787 and EIS board, (KE11E) M7238

by jnc＠mercury.lcs.mit.edu

> From: Josh Dersch > (while installing the MMU and Stack Limit Register in my own 11/40) BTW, I think I found out why the MMU requires the SLR. The SLR is not operative in User mode. I haven't checked out the circuitry to see exactly what the interaction is, but it has to be something associated with that. > you *will* need an LTC to run V6 UNIX Actually, it will work with a KW11-P, too; those are actually more commmon than the KW11-L's, I've found. But as Guy pointed out, the DL11-W will do too - and those are _very_ common (since they were used in the 11/34's, etc). Noel

7 years, 3 months

Information Request: unidentified HP 9825T instructions

by jnc＠mercury.lcs.mit.edu

> From: Tony Duell > My first thought, and it's probably wrong Apparently not... :-) > these instrucitons (which differ by one bit, so might be > setting/reseting something) are NOPs to the CPU, but are interpretted > by the memory mapping hardware Ooh, very clever/cool. Noel

7 years, 3 months

DATAC 1000

by billdegnan＠gmail.com

Looking for a DATAC 1000 if anyone has one for sale or trade (or a site with pictures). This is a Philadelphia USA origin 6502 trainer. I am interested in it for the local history. Thanks Bill

7 years, 3 months

PDP 11 Line Time Clock (LW11L) M787 and EIS board, (KE11E) M7238

by jnc＠mercury.lcs.mit.edu

> From: William Degnan > PDP 11 KE11E M7238 EIS board (for PDP 11/40) which causes the CPU to > crash when installed; front panel not responsive > ... > I installed a removable jumper so I can flip jumper configs back and > forth between EIS installed/not installed. Without the EIS the system > works fine To understand this symptom, one needs to understand how the EIS interacts with the main CPU. Both include microcode, and what is supposed to happen is that when an EIS instruction happens, control is passed to the microcode on the EIS board (the actual microcode words being fed back to the main CPU through those three over-the-back jumper cables). The microcode on the EIS board can then control the data paths, etc in the main CPU, to feed the EIS data, and take back the results of the computation performed on the EIS card. I'm trying to understand what W1 does, but I'm not there yet. It's shown on the KD11-A print K3-8 (pg. 48), in the lower left corner, but its effects are somewhat obscure. To start with, the array of odd chips E6-E7 (74H60's) and E17 (74H53) are expandable AND-OR gates. I'd never seen these before, but the lines running to and from pins 11 and 12 on the 'H53 join the other three gates below it into it - i.e. that whole array of AND gates all feed into one NOR gate (output on pin 8 of the 'H53). So far, so good, but from there I'm still lost. When W1 is inserted (no EIS) it grounds the signal ECIN00, which comes in from off-board (as shown by the "A05S2", which is the pin it arrives on). The output of that giant NOR gate is CIN00, which is immediately sent off-board (pin 'A05P1'). I have yet to try and chase these signals down, and work out what they do; the KD11-A Tech Manual is fairly cryptic on the subject. Note also that, IIRC, the front console operates under control of microcode. So I'm _guessing_ that what is happening is that somehow the EIS is, when enabled, messing up the operation of the microcode in the main CPU, causing it to freeze. > Thought - I don't have a LW11L, M787 installed. ... Do you think that > maybe the EIS board requires this for some reason No. I've looked at the KW11-L prints in the past, and it's just a very simple UNIBUS device. I don't see any way it not being there could cause the symptoms under discussion. > I could swap out the current 11/40 backplane with a backplane that has > the jumpers for the M787 already removed I think it's only one jumper - for BG6, no? > I neglected to mention I had no M787 To run Unix V6 you'll need either a KW11-L or KW11-P (see previous discussion about how Unix needs a clock - both at a low level, because it will panic() if it doesn't find one, and at a high level, because even if we patch the panic, stuff won't 'work right' without one). Noel

7 years, 3 months

PDP 11 Line Time Clock (LW11L) M787 and EIS board, (KE11E) M7238

by billdegnan＠gmail.com

Question - I am working on a PDP 11 KE11E M7238 EIS board (for PDP 11/40) which causes the CPU to crash when installed; front panel not responsive, can't boot XXDP. I installed a removable jumper so I can flip jumper configs back and forth between EIS installed/not installed. Without the EIS the system works fine, can boot OS's that do not require it like RT11. As discussed before the EIS is required if I want to boot up UNIX 6 on the 11/40, which is a goal of mine. Thought - I don't have a LW11L, M787 installed. This is a the Line TIme Clock option card. Do you think that maybe the EIS board requires this for some reason, even though there are no references to this as a requirement in any docs I can find? Maybe the docs writers assume it's installed? I only wonder because any time I have seen the M7238 installed in an 11/40 I have also seen a M787. I could swap out the current 11/40 backplane with a backplane that has the jumpers for the M787 already removed, but I only want to do this if it's necessary. When we were talking before I neglected to mention I had no M787, you may have assumed I did. Bill

7 years, 3 months

Trend HSR500 Paper Tape Reader manual

by ard.p850ug1＠gmail.com

I am not sure if anyone is interested, but I've scanned the manual for the Trend HSR500 and HSR500P optical paper tape readers. If I've got the permissions right, then you can get it from my google drive on : https://drive.google.com/open?id=0B5uNCTLB4VsqRU9TWDIzWnZYaU0 It's a large file, I don't think the scanner software has heard of compression!. If anyone can make it a more reasonable size, feel free... This is a proper manual with schematics, parts lists, adjustment info, etc. I've also scanned the circuit diagrams for the Trend Paper Tape Station, here https://drive.google.com/open?id=0B5uNCTLB4VsqemRFMnVNb0l5WU0 The Paper Tape Station is a rack unit containing an HSR500 reader, power supply, GNT34 punch and a driver card for the punch. Those diagrams are for the punch driver and power supply, you need the HSR500 manual as well. Let me know if it all works... -tony

7 years, 3 months

8085 RAM testing program

by witchy＠binarydinosaurs.co.uk

Hi folks, I'm at the point of troubleshooting this 8085 board where I need to test all the RAM. The code loops at an IN looking for....something. Based on other assembly programs I've looked at the code is very similar to eg a disk controller looking for a READY signal from a drive. Trouble is I have no idea what's expected to be at I/O port 0xE3. If it was one of the peripheral chips I'd expect a chip select line to go low. The 74LS139 that does chip select is OK - I've tested it off-board and all traces going to it buzz out OK. The code uses upper RAM as a scratch pad so what I'd like to do is replace the $0000 ROM with an EPROM containing RAM test code. I've found incomplete examples that need to be tailored so before I go reinventing the wheel has anyone got a working example I can use? Warnings of things I should and shouldn't do? RAM is at $8000-$FFFF, and at least some of it is ok since the stack pointer is up at 0xF0B3 and I can trace the code by watching which addresses it's reading. Cheers! -- Adrian/Witchy Binary Dinosaurs creator/curator Www.binarydinosaurs.co.uk - the UK's biggest private home computer collection?

7 years, 3 months

Information Request: unidentified HP 9825T instructions

by cruff＠ruffspot.net

I am working on the disassembly and commenting of the 98228A disk ROM for the 9825T, and my disassembler flagged two instructions as invalid. They are used inside a routine that copies blocks of words from various banks of the ROM into low RAM. The first, bit pattern 070113, is used immediately after a dir (disable interrupt) instruction. The second, bit pattern 070117, is used immediately before an eir (enable interrupt) instruction. The ?invalid? instructions do not match any instructions described in the 9825A patent, nor are present in the 9835 or 9845 assemblers instruction descriptions. From the surrounding code, it doesn?t appear that these instructions reference any of the user visible CPU registers, but are used in some way that enhances the effect of dir/eir and ensures the block copy is not interfered with. Anyone have any ideas? Possibly a DMA request ignore/resume pair?

7 years, 3 months

Disassembly of a DG One?

by isking＠uw.edu

Hey all, Is anyone out there familiar with disassembly of the Data General DG One portable? I have one of the EL models - it looks so cool! - and the hard drive is stuck. I want pull it out and repair it, but I've reached an impasse. I have the machine disassembled and the HD case is accessible, but there is no obvious way to remove it. I don't like to just force things, for obvious reasons. Thanks to anyone with some advice. -- Ian -- Ian S. King, MSIS, MSCS, Ph.D. Candidate The Information School <http://ischool.uw.edu> Dissertation: "Why the Conversation Mattered: Constructing a Sociotechnical Narrative Through a Design Lens Archivist, Voices From the Rwanda Tribunal <http://tribunalvoices.org> Value Sensitive Design Research Lab <http://vsdesign.org> University of Washington There is an old Vulcan saying: "Only Nixon could go to China."

7 years, 3 months

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test-drb February 2017