Some people have asked me for such ROMs (which allow an HP87 or HP86
computer to access newer disc drives such as the HP-9122) in the past.
There is an eBay auction at
http://cgi.ebay.com/HP-87-ROMS-5-Each_W0QQitemZ6806475882QQcategoryZ172QQss…
for three EMS ROMs.
Note that the auction is NOT run by me, nor do I know the seller.
**vp
> -----Original Message-----
> From: cctalk-bounces at classiccmp.org
> [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Allison
> Sent: dinsdag 27 september 2005 16:18
> To: cctalk at classiccmp.org
> Subject: Re: (no subject)
>
> >
> >Subject: (no subject)
> > From: Frank Arnold <fm.arnold at gmx.net>
> > Date: Tue, 27 Sep 2005 15:24:06 +0100
> > To: cctalk at classiccmp.org
> >
> >>
> >>Message: 28
> >>Date: Mon, 26 Sep 2005 13:42:48 +0200
> >>From: "Gooijen, Henk" <GOOI at oce.nl>
> >>Subject: RE: difference between LSI-11 CPU's M7264 and M7270
> >>
> >>> -----Original Message-----
> >>> On Sep 26 2005, 8:40, Gooijen, Henk wrote:
> >>>
> >>>
> >>> <-- M7270 -LSI11/2--> <--- M8044 MSV11---->
> >>> <------ empty ------> <--- M7940 DLV11---->
> >>> <------ empty ------> <------ empty ------>
> >>> <------ empty ------> <------ empty ------>
>
> >
> >Henk, there is no bootstrap in this system....
> >
> >>
> >>The FieldGuide says that a few lines are used for something
> >>else, but I expect (hope) that the M7270 and the M7264 usage
> >>of all connections is identical.
> >
> >No, I think only the LSI11 suplies refresh to the bus,
> >LSI11/02 does not.
> >They use some of the sspare lines for that, that much later got
> >used for Adressbits 19-21 once Q-bus got Q22
>
> Correct on refresh, the 7270 does not provide it (not needed
> for 8044 memory).
> However, the unused microcode lines are not used for refresh.
> Those are use for special (unimplmented) microcode.
>
> >>Regarding the M8018 WCS option: is this "just" a chip, like
> >>FIS or the big CIS one?
> >
> >Those are LSI11/23 options...
>
> The M8018 KUV11-AA is for the M7264 (LSI-11, KD11-f), I have
> also tested it with M7270 (LSI11/2)(sort of a hack).
>
> There was a microcode WCS option for the 11/23. It is also a
> board. I don't think it was ever sold. There was a FPU option
> M8188 (FPF11) a quad width board for the 11/23 that was sold.
>
> >Unfortunately I dont have this (still hunting), but yes, it
> >is a board. It takes only the power from the Q-bus and connects
> >with a flatcable to the microm socket on the LSI-11 module.
> >I also heard the fact that this works (or was DEC-supported) only
> >on the quad LSI11, but can't see a good reason for this, as the
> >chipset is identical. It even has the empty socket to connect the
> >WCS-option. Maybe the engineering drawings will tell more.
>
> It was design specific for the M7264-YC though it seemed to
> work with any of the M7264 or M7270 modules (microcode
> address specific caveat).
> The DEC supported config was on the M7264-YC. The difference
> is that each microm socket has a unique microcode address and
> is diagnostic specific.
>
> Allison
Thanks, Frank and Allison.
I guess, now is a good moment to start reading the LSI-11 handbook
and to look out for a bootstrap kind of module ! Is there a specific
module to look for, or are there several possibilities? Remember,
this system only has 4 slots (almost 2 occupied), and I want to add
at least modules to get some parallel I/O (TTL) lines, and to boot
the system from (Pete Collum's RXV11) ...
The idea that I have for this system is the following.
I want to use a small 486 system as terminal and mass storage.
The parallel I/O will interface to a filter-based RTTY demodulator.
Software (to be written) will turn this setup to a telex reception
station (transmitting RTTY will follow!) I know that many programs
already exist for this (not on PDP-11), but I want to learn MACRO-11
and learning a language goes best if you have an application idea.
I expect it will not be difficult, after I learned the way MACRO-11
wants its assembly text, because it looks quite like M68000 mnemonics.
That will probably cause some pitfalls, but I must look up all the
PDP-11 mnemonics in the beginning anyway.
Fun job for this winter!
73,
- Henk, PA8PDP.
On 9/26/05, Jeff Walther <trag at io.com> wrote:
>
> If a tristate buffer is enabled by its control line, but the input to
> the buffer is at high-Z is there a typical output?
If there is it probably varies between parts. If you need a defined output
for tristated inputs you should pull the inputs up or down.
Eric
>
>Message: 28
>Date: Mon, 26 Sep 2005 13:42:48 +0200
>From: "Gooijen, Henk" <GOOI at oce.nl>
>Subject: RE: difference between LSI-11 CPU's M7264 and M7270
>
>> -----Original Message-----
>> On Sep 26 2005, 8:40, Gooijen, Henk wrote:
>>
>>
>> > <-- M7270 -LSI11/2--> <--- M8044 MSV11----> ==================
>> > <------ empty ------> <--- M7940 DLV11----> | o o __ __ __ |
>> > <------ empty ------> <------ empty ------> | ~~ ~~ ~~ |
>> > <------ empty ------> <------ empty ------> ==================
>> >
Henk, there is no bootstrap in this system....
>
>The FieldGuide says that a few lines are used for something else, but
>I expect (hope) that the M7270 and the M7264 usage of all connections
>is identical.
No, I think only the LSI11 suplies refresh to the bus, LSI11/02 does not.
They use some of the sspare lines for that, that much later got used for
Adressbits 19-21 once Q-bus got Q22
>
>Regarding the M8018 WCS option: is this "just" a chip, like FIS or the
>big CIS one?
Those are LSI11/23 options...
>I thought it was a board (module) as the M number suggests.
>Anybody here has a M8018 WCS and can tell more about it?
>
Unfortunately I dont have this (still hunting), but yes, I is a board. It
takes only the power from the Q-bus and connects with a flatcable to the
microm socket on the LSI-11 module.
I also heard the fact that this works (or was DEC-supported) only on the
quad LSI11, but can't see a good reason for this, as the chipset is
identical. It even has the empty socket to connect the WCS-option.
Maybe the engineering drawings will tell more.
Frank
I think his issue is trying to seperate the common data bus to Din
and Dout for the chips. However with most drams that can be handled with
WE/and Ras/ timing if memory serves thus avoiding that tristate buffer.
Allison
>
>Subject: Re: Tristate Buffer Output if Input is High-Z?
> From: "ROBO5.8" <robo58 at optonline.net>
> Date: Tue, 27 Sep 2005 08:47:53 -0400
> To: "General Discussion: On-Topic Posts Only" <cctech at classiccmp.org>
>
>Most TTL (74xxx) series parts have pull up resistors on their inputs so they
>will typically interpret a High-Z condition as a "1" or high input.
>
>I'm not sure what you're trying to do with the separate Din/Dout
>configuration. Are you trying to interface the 16Mx4 chip onto an existing
>motherboard or memory card or design a new add in card? That info would
>help with the advice.
>
>Robo
>
>
>----- Original Message -----
>From: "Jeff Walther" <trag at io.com>
>To: <cctech at classiccmp.org>
>Sent: Monday, September 26, 2005 7:09 PM
>Subject: Re: Tristate Buffer Output if Input is High-Z?
>
>
>> If a tristate buffer is enabled by its control line, but the input to the
>> buffer is at high-Z is there a typical output?
>>
>> I checked the relevant datasheet, but this situation isn't covered.
>> There's timing for when the buffer is enabled and the input switches from
>> L to H or H to L, but nothing about the input at high-Z.
>>
>> The truth table as written in the datasheet:
>>
>> 2OE 2A 2Y
>> H H H
>> H L L
>> L X Z
>>
>> I need another row for
>>
>> 2OE 2A 2Y
>> H Z ?
>>
>> Where OE is the control, A is the input and Y is the output.
>>
>> I'm still futzing about with this IIfx SIMM idea. I plan to use a pair
>> of SN74ABT241A octal buffers to make the 16M X 4 chips look as if they
>> have separate Din and Dout pins. And I planned to use the WE_ signal as
>> the control to the buffers.
>>
>> However, it occurred to me that the computer might hold WE high at all
>> times except during writes. This would leave the Dout path enabled almost
>> all the time, which might interfere with other activity on the data bus.
>>
>> Once CAS goes high, the Dout of the DRAM chips would go back to high-Z, so
>> the computer designers would figure, leaving WE_ high most times is fine.
>> DRAM output is high-Z unless one just did a read with a CAS signal.
>>
>> But if I'm feeding the DRAM output into a tristate buffer this might not
>> work. The high-Z from the DRAM goes to the buffer as input. The WE_
>> signal enables the buffer. What comes out the other end of the tristate
>> buffer onto the data bus? If the buffer drives the data bus in this
>> situation, then this won't work.
>>
>> I really don't want to add an AND gate and an inverter so I can change OE
>> for the tristate buffer to WE*CAS'.
>>
>> Of course, if WE_ is floating most of the time, it's not a problem. I just
>> lightly tie OE to GND and when WE floats, the buffer outputs go to high-Z.
>> But I can't count on that.
>>
>> Run off a set with spaces for all the possible control signals I can
>> imagine and experiment?
>>
>> Jeff Walther
>>
>
>
>Subject: (no subject)
> From: Frank Arnold <fm.arnold at gmx.net>
> Date: Tue, 27 Sep 2005 15:24:06 +0100
> To: cctalk at classiccmp.org
>
>>
>>Message: 28
>>Date: Mon, 26 Sep 2005 13:42:48 +0200
>>From: "Gooijen, Henk" <GOOI at oce.nl>
>>Subject: RE: difference between LSI-11 CPU's M7264 and M7270
>>
>>> -----Original Message-----
>>> On Sep 26 2005, 8:40, Gooijen, Henk wrote:
>>>
>>>
>>> > <-- M7270 -LSI11/2--> <--- M8044 MSV11----> ==================
>>> > <------ empty ------> <--- M7940 DLV11----> | o o __ __ __ |
>>> > <------ empty ------> <------ empty ------> | ~~ ~~ ~~ |
>>> > <------ empty ------> <------ empty ------> ==================
>>> >
>
>Henk, there is no bootstrap in this system....
>
>>
>>The FieldGuide says that a few lines are used for something else, but
>>I expect (hope) that the M7270 and the M7264 usage of all connections
>>is identical.
>
>No, I think only the LSI11 suplies refresh to the bus, LSI11/02 does not.
>They use some of the sspare lines for that, that much later got used for
>Adressbits 19-21 once Q-bus got Q22
Correct on refresh, the 7270 does not provide it (not needed for 8044 memory).
However, the unused microcode lines are not used for refresh. Those are
use for special (unimplmented) microcode.
>>Regarding the M8018 WCS option: is this "just" a chip, like FIS or the
>>big CIS one?
>
>Those are LSI11/23 options...
The M8018 KUV11-AA is for the M7264 (LSI-11, KD11-f), I have also tested
it with M7270 (LSI11/2)(sort of a hack).
There was a microcode WCS option for the 11/23. It is also a board. I
don't think it was ever sold. There was a FPU option M8188 (FPF11)
a quad width board for the 11/23 that was sold.
>Unfortunately I dont have this (still hunting), but yes, I is a board. It
>takes only the power from the Q-bus and connects with a flatcable to the
>microm socket on the LSI-11 module.
>I also heard the fact that this works (or was DEC-supported) only on the
>quad LSI11, but can't see a good reason for this, as the chipset is
>identical. It even has the empty socket to connect the WCS-option.
>Maybe the engineering drawings will tell more.
It was design specific for the M7264-YC though it seemed to work with
any of the M7264 or M7270 modules (microcode address specific caveat).
The DEC supported config was on the M7264-YC. The difference is that
each microm socket has a unique microcode address and is diagnostic
specific.
Allison
Hi all,
I finally got to set up my PDP-11/34C with TU80 and two RK07 drives.
Given the space in my "museum", the RK07 drives are not immediately
next to the 11/34 rack. I am looking for an RK07 cable, part number
70-12292-25 or 70-12292-40 (25 or 40 foot length).
The cable *looks* like the RL01/RL02 cable, but is not identical !
You can use the RK06/RK07 cable with RL01/RL02 drives, but not the
other way around, because the RK06/RK07 cable has a few extra pins
actually connected (which the RL drives does not need).
That's what I've heard long ago ...
If you have a 70-12292-25 or 70-12292-40 and no longer need it,
I will gladly pay or trade for it. See my website (www.pdp-11.nl)
for the "spare boards" list, although it is not up-to-date / correct.
TIA,
- Henk, PA8PDP.
Hi, I?ve bought an TEAC FD55GFR184U floppy, but it?s still not working with
an MXV22 or RQDX3 controller. I think it must be jumpered to DD, but can?nt
find a manual or othes docs. Do you have some hints for configuration?
Thanks for answering.
Martin
wenz.m at web.de
Hi Randy,
I found your mail to tony Duell were you talked about configuration-problems
with an FD55-floppy. I also have the problem to connect an FD55GFR184-drive
with an RQDX3 or MXV21 controller and no manual. I tried some jumpers, but
it?s not working. Can you help?
Martin
wenz.m at web.de
On Sun, 25 Sep 2005, Chuck Guzis wrote:
> I did locate his website and he apparently is still flogging postscript along with a fw other of his pet projects:
>
> http://www.tinaja.com
>
> And, yes, he's advocating Postscript for general math usage (now using Acrobat Distiller). Here's a sample:
>
> http://www.tinaja.com/text/onesword.html
Umm yeah, Don does tend towards enthusiasm for his ideas.
I did use his PostScript stuff in a project; PostScript to "turtle
graphics" (motion eg. N N N PENDOWN E E E PENUP S S S... where N,
S, E are compass directions) followed by simple run-length
compression, subsequent data blocked and punched on paper tape and
a simple PIC-based box drove an analog plotter, and my favorite, a
Tek 565? storage scope.
"Real Soon Now" (to quote another crusty SOB) I will finish my
microdisintegrator, a surplus stepper-drive XY table (some 30
microinch resolution) for engraving metal with arbitrary text and
images. It'll use the same tech to drive the XY table and
disintegrator "pen" from postscript.
Illustrator to metal!
