One other thing, before soldering stuff onto that board, make a copy
of it. (Do photocopiers make decent prints of bare boards?) Once
a board has chips soldered onto it, it can be a pain to figure out
which things connect to what. Having a bare-board print could help
a lot in reverse-engineering the schematic (although I suspect there
are still MP-A schematics to be had out there). And who knows, you
might someday want to clone that board.
Cheers,
Bill.
] From: "Jeff Kaneko" <Jeff.Kaneko(a)ifrsys.com>
]
] Guys:
]
] Afer looking at a number of responses, Uncle Roger's position
] seems the most logical to me (besides, one other person suggested
] this also). I think I'll buy that parts to build this, and just keep
] it until needed.
]
] Building it won't be a priority, though. The MP-A wasn't exactly the
] best SS-50 CPU available. I have a NOS Thomas Instruments Super CPU,
] that I've wanted to build for years. Compared with other S-50 boards
] of that era, it had alot of cool features. I am working on getting a
] couple of scarce parts for its companion video board.
]
] Jeff
I realize that this may not quite reach the 10year mark, but not many
people deal with even this old of hardware. (Is there a group out there
for "obsolete" yet non-yet-classic hardware?)
I need to find somewhere to get many i387 chips. (I currently need about
15 to 20 of them.) Anyone know the best place to start looking?
Adam
----------
Adam Fritzler
afritz(a)iname.com
http://www.afritz.base.org
----------
On Apr 11, 23:08, Tony Duell wrote:
> > Some versions and OS vaiations allowed a 2KW IO space. I've run RT-11
> > that way.
>
> Yep, you're right. The standard on Unibus machines was for a 4kW I/O
> space. I've seen PDP11/45's and PDP11/34's that were modified for 2kW I/O
> space, and, indeed, undone the mods. Some Q-bus machines had 2kW I/O
> space as standard, I think.
The 11/03 is the most notable one with a 2KW I/O space, but that's a mod, not
the standard. Quit commonly done, though, because it was only 16-bit address.
> Didn't the 11/24 have an optional unibus map card (the KT24?) I've never
> seen one - my 11/24 is a pretty minimal configuration.
Yes, I've got one, and it is indeed 22-bit. The problem is, I only have the
board set, not the backplane, front panel, etc. I have a spare backplane, and
I once inrtended to rewire it and build a panel, but never found enough info
(the second slot is wired to the first in a non-standard way, to accomodate the
Unibus map connections).
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
<Well, as it happens I don't know whether Radio Shack ever took to
<manufacturing all Model 1 TRS-80s with numeric keypads after some
<date, or whether the numeric keypad was included with the Level II
<BASIC upgrade (don't think so, at least not always), or whether it was
<available without a Level II BASIC upgrade. So I'd have been
<surprised by that keypad too, but for all I know it could have come
<from the factory like that or been upgraded by its original owner, who
<wanted to do lots of numeric data entry on a Level I BASIC system.
Trs-80s early were level-1 basic and 4k ram. Later the ram, LII basic,
and even the numeric keypad were offered as options or as factory models
(often upgraded in the store!). Later ones had the keypad as standard
and 16k as well becuase the 4k rams were actually getting scarce and the
demand was for 16k. At any given point in the model one life where are
variations in configurations such as three different circuit cards,
at least three different keyboards and 5 different rom combinations!
Also LII basic was not required to use either the keypad nor the 16k ram.
For example L1 basic was either a two rom(or eprom) set or a single
rom(eprom). The LII basic was initally a three roms set (eprom) on a
seperate pigtail card but later ones used a two rom set that plugged into
the base board with out the pigtail set. Also both basics were released
using different vendors roms(erproms) that in some cases required a
different dip header config or wire jumpers to use them.
Even I who worked for tandy on the program was surpriced when I got a
LII machine with a single peice extended keyboard (keyboard and numeric
in one unit) that was apparently of late manufacture. It was however
legit factory. Actually a rather pleasent surprize!
Allison
<The PDP11 (at least every PDP11 that I've used) addresses memory by
<bytes. OK, a 16 bit word, like an instruction, does have to lie on at an
<even address, but the 16 bit address that a program generates (before
<translation by the MMU) addresses one of 64K _bytes_
True but, if the memory contained nothig but instructions and addresses
32KW is the limit. Only data or IO is addressed as bytes. This would
seem a trivial item it makes a difference in terms of the total number of
instructions in any given amount of ram. This is more important when
applied to machines with I&D space where the byte addressability can be
exploited for buffers and the like.
<The I/O page (certainly on Unibus PDP11's) is 4 K _words_ long. Without
<an MMU you have 28kW memory, 4kW I/O
Some versions and OS vaiations allowed a 2KW IO space. I've run RT-11
that way.
<Wit hthe MMU enabled you can have 64k Bytes (32 k Words) of memory mapped
<in. In fact you generally don't map the I/O page into user processes,
<since you don't want user processes accessing device registers.
True but then people ahve to understand that the MMU design seperates user
space from system space.
<Even if you have the MMU it's a lot simpler if your program fits into 32
<kW (or 28kW if you want access to the I/O space). Otherwise you have to
<do something like using a software interrupt to change the MMU to a
<different mode.
I tried to keep it simple.
<Unless page K1-11 of my PDP11/44 printset is wrong, the PDP11/44 has 22 b
<addressing. The PDP11/45 does, indeed, only have 18 bit, alas...
With the exception of the 11/70 I thought most of the unibus machines were
limited to 18bits, for some devices that can be a limit. My interaction
with U-bus machines is limited to the 11/70 and a 11/34 all my PDP11 time
is with Q-bus (11/03, falcon, 11/23, 11/23A, 11/23b, 11/73) which has
sufficient enough variation to track.
Allison
< Allison, this was private email, but I figure this may be
OOPs, though I did check the header as classiccmp...?
< like the 11/23 and 11/73 line should run this BSD variant as
< well... what I want to know is, did the kernel fit into 64K in
< one segment, or did they spread the kernel across segment
< bounderies? If so, how?
The kernel never fit in 64kb as the pdp11 is word addressed also the MMU
operates on 4kb pages. Also the top 4kbytes are IO space. So the idea of
the kernel fitting in 64k is not relevent. The real question was did it
fit in the 11/44 or 45 who only had 256k (18bit addresses) space. The
11/23 and later Qbus machines were Q22 (4mb address space). The larger
space means more available ram that can be used without resorting to
swapping (or at least less frequently).
Also PDP11s come in two other flavors, those with I&D space and those
without. The 11/23 and 11/34 are those without. The 44, 45, 70, 73,
83 and others have I&D which means that Instructions and Data spaces can
be seperate doubling the amount of memory available. Added to that is
user and system space (memory protection between processes). So it's
possible for a PDP11 to actaully address four distinct areas of memory
that are non-overlapping and all 64k in size. Practical considerations
limit it to less than that but it's nearly so and likely they would
overlap as well.
< I mean, I could see overlays (in the kernel... blech!), but I
< don't remember the 11 supporting long long jumps... and address
< value was 16 bits, period. Still, I was never great at 11
True of all segmented address machines. The larger 256k or 4mb space is
broken into pages of which up to 8 are mapped into the 16bit address
space. To do a long jump what is really done is the cpu remapped the
needed page into logical space and does a 16bit jump to that page.
The top 4 bits determine what page register is addressed and the contents
of that register is appended to the lower 12 bit to form the larger
address needed to manage a 4mb space.
It takes 8 MMU registers and uses the content of the reg plus the 16bit
address to form an address in physical space.
< assembly. Could someone here give a good detailed account of
< PDP-11 segment mapping support? Could my stack and register
< values be retained and follow while moving from segment to
< segment? And how the hell did you tell the memory manager you
< wanted to pop to another segment, anyway?
yes! A detailed discussion would wear out my fingers typing it.
Sufficient that it was able to address more than 64k and while different
than the 8088 or 286 in both cases the 16 bit address space was extended
by argumenting the basic addressing and not extending the basic register
set.
I'm currently building a system using the z80 cousin called the z280 that
can address 16mb of ram and the basic addressing is still 64k argumented
by a MMU.
Allison
> I seem to remember early Ethernet interface VAX quad cards
> being around 1.5Mbps... not sure if it was think ether, vampire
> tap stuff... This would have been before ethernet was turned
> into a 'standard.' One guy I know has one of these hanging
That is a DMC-11. It was an early networking card before Ethernet. It
was point to point, 4 wire coax, synchronous serial at something around
1.5Mbps. The DMC-11 had an onboard bit slice processor (might have been
a Signetics 8X305, not sure) to handle the packet assembly/disassembly.
BTW the KMC-11 was a generic DMC-11 that was user programmable, if you
wanted to roll your own protocols. I used a pair of DMC-11s in 1977 to
network two PDP-11/34s with an early version of DECnet. I don't recall
that DEC had any multi-drop type network interface at that time, except
maybe for X.25 PADs.
< Alright, so what we have is the last 4KW used up for stack
< space, register mapping, and IO mapping. I would guess the
and also boot proms. Default boot on PDP11 is 173000Q. The first
page is where all the vectors for the interrupts and traps are.
< MMU... do I have it right? Even on a machine with a full
< 22bits of address lines on the backplane, like an 11/73, the
< CPU still only has a 16bit address space. The faq doesn't make
< it terribly clear what happens if you want to open up any
< arbitrary window.
Think of the 4mb (q22) as linear physical space. At any time the CPU/MMU
can allocate contigious or scattered blocks of that space as logical
physical space. To do a "long jump" a local jump to a system space is
done, memory management code is run and then a jump to the now available
code (in logical space) is done. One of the background jobs would be to
swap out old segments that are unused to make room for current processes
and swap them back if the non current process should wake up.
The cpu is always in logical 16bit space but the windows (multiple)
can be moved around.
An ascii graphic would show the CPU 16bit space as several blocks
mapped to multiple blocks scattered in a larger space. The cpu
literally never leaves the range of a 16bit space but instead trade
out chunks of it for different ones out of an available pool. You never
actually jump put of logical space only shuffle what physical memory is
part of that space.
Allison
who bloody cares?! people, deal with your own problems; I dont want to hear
about them on the list. I have enough to deal with myself!
david, back to deleting stupid messages <again>
In a message dated 98-04-10 17:47:45 EDT, you write:
<< Without comment
enrico
Anonymous wrote:
>
> Are you a fucking idiot, Limey? Cut the damn crying on the mailing list or
you might just open a message one day and have your whole machine become
instantly erased...Not a threat, a promise.
--
========================================================
Enrico Tedeschi, 54 Easthill Drive, Brighton BN41 2FD, UK
Tel/fax(+01273) 701650 (24 hours) and 0498 692465 (mobile)
please visit my website at: <http://www.brighton-uk.com>
========================================================
On Apr 10, 21:13, Zane H. Healy wrote:
> Subject: gcc for VAX VMS
> This touches on yesterdays VS2000 discusion. Somehow I got lucky today and
> found a pointer to a VAX version of gcc at
> ftp://ftp.cco.caltech.edu/pub/rankin/ of course I'm still trying to find a
> VAX VMS version of tar and gzip so I can install it.
Take a look at
http://www.openvms.digital.com/openvms/freeware/cd.html
Near the bottom of the page you'll find the "Tools" section, which includes
zip, unzip, gzip, and vmstar. Unzip, gunzip, and vms tar are also on Digital's
ftp site. There's a pointer at
http://www.digital.com/info/vms-freeware.html
or ftp directly from ftp://ftp.digital.com/pub/VMS/vmstar-vax.exe
Now, can someone remind me of the URL for VMS hobby licensing so I can do
something about my MicroVAX?
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
