Hi everyone, I've made tremendous progress on my 3B2 emulator. It's being implemented under the SIMH simulator platform, which has been a huge help. My WE32100 core is getting closer to being complete. I'd consider it alpha quality right now, but it has enough instruction coverage to pass the 3B2's power-on self tests and to (barely) run some of the 3B2 firmware mode tools. Implementing the WE32100 core has been thanks to the processor manual and assembly language manuals that are available on BitSavers, but outside of the CPU, virtually all of my understanding of the 3B2's architecture has come from studying the ROMs and the SYSVR3 source code. I've also been helped by having remote access to a running 3B2 so I can assemble and disassemble code using the real AT&T tools. Beyond that, I have found precious little documentation. I'm at the point now where I'm pretty well stuck until I can find more information. I understand large chunks of the memory map now and should be able to do things like simulate the floppy and hard disk controller, but there are large gaps in my understanding. There are many undocumented registers that are used by the firmware, but don't appear in the SYSV source code anywhere. What they mean and what they're for is anybody's guess. I've just stubbed them out for now. If anybody has access to schematics, architecture docs, or other memory map information, I'd be eternally grateful if you could share it! -Seth