Hmm... Having said all that, it might be
possible to put a state
machine into a 16V8 that had a 7 bit current state and a next state
function that corresponded to "counting" is seven segments. In
theory that'd work, but I don't know off hand if there are enough
terms inside a 16V8 to implement that next state function.
You also need to make sure that the next-state function converges on a
valid state from all possible start states, or else add a way to reset
it to some valid state (probably zero).
Using (what I think of as) the canonical 7-stroke digits,
_ _ _ _ _ _ _ _
| | | _| _| |_| |_ |_ | |_| |_|
|_| | |_ _| | _| |_| | |_| _|
with the segments identified as A to G from top to bottom, left to
right, the digits are
Not that it invalidates your logic (it's just a permuation of the
outputs, after all), but the conventional naming of the segments is
A
----------
| |
F | | B
| |
----------
| G |
E | | C
| |
-----------
D
with the decimal point sometimes refered to as 'H'
A B C D E F G
0 1 1 1 0 1 1 1
1 0 0 1 0 0 1 0
2 1 0 1 1 1 0 1
3 1 0 1 1 0 1 1
4 0 1 1 1 0 1 0
5 1 1 0 1 0 1 1
6 1 1 0 1 1 1 1
7 1 0 1 0 0 1 0
8 1 1 1 1 1 1 1
9 1 1 1 1 0 1 1
Then, if X' is the next-state X, I find that, optimizing for gate count
(NOT, AND, OR, NAND, NOR), if I didn't make any typos feeding the
program,
A' = ~(G&F&~(D&B)) [2 gates - 2NAND, 3NAND]
B' = (C&F&D)|(A&~E) [4 gates - NOT, 2AND, 3AND, 2OR]
C' = E|~(B&~(D&C&A&B)) [3 gates - 4NAND, 2NAND, 2OR]
D' = ~(B&(C|E)&A&~(D&C&F&E)) [3 gates - 4NAND, 2OR, 4NAND]
E' = ~(E|(D&~(D&A&B))) [3 gates - 3NAND, 2AND, 2NOR]
F' = A|D [1 gate - 2OR]
G' = ~(G&F&(C|E)&~(D&C&A&B)) [3 gates - 4NAND, 2OR, 4NAND]
The structure of a PAL/CAL is a programmable AND matrix followed by a
fixed OR matrize. That is, the D inputs of the flip-flops come from OR
gates (with, a fixed number of inputs, I think 8 in this case), the inputs
of thost OR gates come from AND gates which can be programmed to AND
together any comination of inputs, feedback terms (outputs of the
flip-flops) and their inverses. With a GAL (although not a PAL), you can
invert the final output on the pin (that is, make the D-tupe store A'
rather than A) if it manas the logic will fit), but IIRC, you have to keep
track of whether each flip-flop is inverted or not, since you have to use
the right sense of the feedback terms. Some CAD tools with convert
arbitrary equations into the right SOP form, sometimes you get to do it
yourself.
-tony
I designed a " new ? " 7 segment LED driver in college and if memory serves
me it takes less terms or gates to shut segments off as opposed to turning
them on ( i.e. for an " 8 " you don't turn off any segments, for a " 9
" you
only turn off segment " E " ( standard 'Tony' convention ).
Best regards, Steven