This is really interesting! I had no idea that DEC used them for some of their processors -- personally I find that fascinating as I always pictured DEC as a "NIH" shop. -- "The Direct3D Graphics Pipeline"-- code samples, sample chapter, FAQ: <http://www.xmission.com/~legalize/book/> Pilgrimage: Utah's annual demoparty <http://pilgrimage.scene.org>

On Sat, 2005-12-31 09:10:35 -0700, e.stiebler <emu at ecubics.com> wrote: Is there some really interesting documentation available for these chips and maybe some microcode for some really simple task? I'd like to really understand how bit-slice CPUs do work to form something like a VAX CPU. MfG, JBG -- Jan-Benedict Glaw jbglaw at lug-owl.de . +49-172-7608481 _ O _ "Eine Freie Meinung in einem Freien Kopf | Gegen Zensur | Gegen Krieg _ _ O f?r einen Freien Staat voll Freier B?rger" | im Internet! | im Irak! O O O ret = do_actions((curr | FREE_SPEECH) & ~(NEW_COPYRIGHT_LAW | DRM | TCPA));

In article <20051231164513.8B0ADBA47E7 at mini-me.trailing-edge.com>, shoppa_classiccmp at trailing-edge.com (Tim Shoppa) writes: I have a genuine copy of "Mick and Brick". This is the Amazon page: <http://www.amazon.com/gp/product/0070417814/002-0495629-6508806> It was the text for a digital design class I took while an undergraduate EE at UDel. Unfortunately, the class was so poorly run that very few people ever got to do any designing or playing with actual circuits. Personally I consider UDel's EE major with the "Digital option" at the time (I graduated 1986) to be a miserable failure in teaching people how to actually *build* anything. I still have a minor circuit phobia for never having actually done anything concrete as a result. I felt pretty ripped off when I arrived at the University of Utah for graduate school and learned that *undergraduate* CS students at UU did more hands-on hardware design and building in their one year hardware course than any EE student at UDel ever did while I was there for 4 years. Just thinking about it still gets my goat. -- "The Direct3D Graphics Pipeline"-- code samples, sample chapter, FAQ: <http://www.xmission.com/~legalize/book/> Pilgrimage: Utah's annual demoparty <http://pilgrimage.scene.org>

Tony Duell wrote: This is going the same way as the change from assembler to high-level languages with compilers: in this case it is gate-level or at least register-transfer-level design to VHDL/Verilog "programming" and feeding the stuff into a "silicon compiler". This was estimatable already when I worked on algorithms for circuit testing for my PhD in 1992. Most researchers were still thinking in terms of gates and flipflops, thereby neglecting that the testing problem is NP-complete for pure combinational circuits or even worse (!) for FSMs (this is *not* in the welldefined NP class), and this was even intractable for circuits with some hundreds to some thousand gates provided the structure was sufficiently irregular. On the other hand, almost noone worked on improving the situation that people would turn to "programming" a circuit - it is no longer obvious what a silicon compiler will produce out of synthesizable VHDL or Verilog, so testing, validating or even verifying the correct function is no longer really possible. Silicon compilers have subtle bugs like every piece of code, and checking that the produced result is really what the designer wanted is as tedious as reading and understanding the assembler output of the gcc for the Linux kernel - noone does this. It appears to me that a lot of enginnering has now turned into some high-level-theology: one just has to *believe* that the result is correct - if not: hopefully find someone else to blame - of course: mistakes in VHDL source code also exist. University teachers have a lot work to do to teach students proper use of tools and correctly typing in sample code - it will divert from the pure science to then even solder that circuit, or solder at least any circuit: likewise one nowadays does no longer bootstrap a computer from a frontpanel by entering some dozens of octal numbers. Just trust the scientific voodoo factor: we know it can be done - no need to prove this in practice. Well: until the engineers enter the job world and find out that they need exactly such low-level debugging skills, provided they still find one of these rare jobs where they still have to produce some real hardware. Holger

I think this one was amd2900 based : CCI Tahoe, also called CCI6/32, Sperry 7000 or Harris HCX/7. 32 bits, very much like a Vax. -- Stephane Paris, France. http://berryer.info

On Saturday 31 December 2005 08:19, Jan-Benedict Glaw wrote: The 11/34A used AM2901 bit slices in it's FP implementation - and the microcode listings are available for both the FP and non-FP microcode of the 11/34A. If you are interested in more detail on DEC's use of bit slices, look at Part IV "Evolution of Computer Building Blocks" in "Computer Engineering", by Moore, Mudge and McNamara. (Every DEC affectionado ought to own and read this book cover-to-cover - multiple times ;-) Here's an excerpt: Page 436 "BIT-SLICES (Fractional Register Level Modules) as building blocks" ... "Today, these components are the dominant mainstream building blocks and have been in a variety of applications. For example, the 4 bit wide AM2901 slice was used in 1976 to implement the 64 bit wide data path of the Floating-Point Processor for the PDP-11/34, and bit-slices are not the technology of choice for mid-range PDP-11 processors." "The building blocks available in 1978 are reasonably represented by the following" (abbreviated): 1. "Datapath slice: A 4-bit wide slice containing arithmetic and logic unit, 16 registers in a two-port file, data buses, shifter, and multiplexers (the AM2901)." 2. "Microprogram control unit. (AM2909: 4 bits wide or AM2911: 12 bits wide.)" 3. "Interrupt processing unit. (AM2914)" 4. "Interface circuits. (AM2917)" In the same book, Chapter 19, the CMU PDP-11 is described in detail - a PDP-11 architected using Intel/Signetics 3000 bit slices. Covered in this chapter is the design, architecture, implementation, benchmarks and costs associated with the project. Bottom-line: The cost of the CMU bit-slice PDP-11 was $1076 in single unit quantity - and estimated to be $419 in quantities of 100+ (1976 dollars). The system was benchmarked to be about twice the speed of an LSI-11 and half the speed of an 11/40. Cheers, Lyle -- Lyle Bickley Bickley Consulting West Inc. Mountain View, CA http://bickleywest.com "Black holes are where God is dividing by zero"

Jan-Benedict Glaw wrote: AMD: The Am2900 Family Data Book AMD: Bipolar Microprocessor Logic and Interface John Mick & James Brick : Bit-Slice Microprocessor Design (Black Bit-Slice Bible) Donnamaie E.White : Bit-Slice Design: Controller and ALUs (Red Bit-Slice Bible) If you have a VAX730, you have already everything you need ;-)

e.stiebler wrote: ... This book is online with the blessing of the author: http://www10.dacafe.com/book/parse_book.php?article=BITSLICE/index.html

woodelf wrote: What about very simple 16 bit risc ? 4 bit opcode, 4 bit destination , 4 bit source 1, 4 bit source 2 ?

woodelf wrote: So just go for the 24 bits, like some Motorola DSP's, Or just go the whole way to the 32 and make a VAX ;-) (8 x 2901, now you have a multi board design, and enough heat ) (the idea of 36 bits I write in the next email ;-) )

On 12/31/2005 at 1:19 PM e.stiebler wrote: You know, there is a small community of folks using FPGAs to implement all sorts of interesting architectures, including the one you've just described. Perhaps it's worth a look... Cheers, Chuck

e.stiebler wrote: Well you can still buy 64k x 1 Drams. :) Disc I/O is the problem but if you don't mind wasting cheap IDE dirve space you can have odd word sizes. I don't see where FPGA's have a 4 bit limit? I am just using 16 bits for now to keep it simple. :)

Philip Freidin wrote: Sorry to disagree here. The LUTs are 4 bit wide, so working with 1..4 bits causes the same delay.

woodelf wrote: I was hoping that I wrote exactly that. That this are four input LUTs ;-) Sorry, I dropped the 1 output, which caused more confusion ...

e.stiebler wrote: Well what ever design I do I run out CLB's or I run out of I/O pins. The main reasion I dropped useing a FPGA is that I had no way of getting the serial prom programed. With CPLD's I got a way to program them, but I still run out of I/O pins or logic cells. :)

On the topic of bit-slices, and an earlier thread which mentioned 'pre-announced chips that never made it into production': The last quarter of the 1975 Fairchild CMOS databook is dedicated to a section titled "Products Planned for 1975" and all the sheets in the section are stamped "Preliminary". Most of the devices made it into the standard 4000-series, but the ones I always found rather curious were a group of devices: 34703: 16*4 parallel/serial FIFO 34704: data-path switch, 4-bit wide 34705: arithmetic logic register stack, 4-bit wide 34706: 16*4 FILO program stack 34707: data access register, 4-bit wide 34710: 16*4 clocked RAM which seem to be intended for implementing CMOS-based bit-slice processors. I never saw or heard about the devices anywhere else. I speculate it's one of those places where Fairchild missed the boat (there's a rather limited market for building bit-slice processors from multiple chips and slow CMOS in the era of the microprocessor).

William Maddox wrote: But looking at the schematics it also makes full use of 74172's , 8 x 2 dual port ram. In fact someone sent me some 74172's but they got lost in the mail. :( The lack of real hardware like TTY's and Core memory made up of so much of the early processors I/O that a full emulation is not possible. Lack of full documention is the other problem. My pdp-8 handbook covers TAD quite well, extended options for hardware multiply , or divide it does not. I could cheat and see what Simh does. :) Ben alias Woodelf PS. Since CPLD's now are 3.3 volts I can use ferro-ram memory after getting a design working @ 5 volts and standard memory.

Remember the 2901 is just the ALU, 16 4-bit registers, and the associated interconnection circuity (multiplexers, etc). If you understand how those work, understnad propagate/generate carry, and know how to make a microcoded CPU in general, then there is little more to learn for the 2901. That said, there is a very good book on the 2900 series called 'Bit Slice Microprocessor Design' by Mick and Brick (no, those names are not a joke). It's not easy to find (or at least it took me some time to find it), but it does contain several examples of 2900-based circuits with the microcode. -tony