1 Feb
2017
1 Feb
'17
3:18 p.m.
Evening folks,
I have two so-called Logic Analysers, both cheap Chinese clones of other
more expensive units that hook up to the host via USB2 and stream readings
direct to software, in one case the open source Sigrok and in the other
genuine Saleae Logic.
I'm getting different and inconsistent readings out of both of them whilst
sampling at 25MHz which should be more than enough for this 6MHz Executel
I'm working on. Both of them are good for spotting dead or stuck outputs but
I still can't get a good set of readings from eg all points on a single
address line. Tonight I replaced all four ROM sockets and ROM chips, tested
each individual line for resistance (0.5 ohms on all apart from an
occasional 0.4 and 0.6) but still get ghost readings.
Is it me or the cheap clones?
Whilst looking for better quality units I came across a couple of 'proper'
HP/Agilent analysers, a 1663A 34 channel and 1661A 102 channel which seem
complete apart from the chip leg grabbers. Am I right to assume some of you
might have experience of these beasts?
Forums seem to mostly think the streaming USB units aren't worth anything
for more than a few channels but I'm still a relative beginner to all of
this. I really need to watch all 16 lines of an address bus and externally
clock it as Tony has suggested.
Any insights appreciated!
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
1 Feb
1 Feb
7:13 p.m.
On 02/01/2017 05:18 PM, Adrian Graham wrote:
Evening folks,
I have two so-called Logic Analysers, both cheap Chinese clones of other
more expensive units that hook up to the host via USB2 and stream readings
direct to software, in one case the open source Sigrok and in the other
genuine Saleae Logic.
I'm getting different and inconsistent readings out of both of them whilst
sampling at 25MHz which should be more than enough for this 6MHz Executel
I'm working on. Both of them are good for spotting dead or stuck outputs but
I still can't get a good set of readings from eg all points on a single
address line. Tonight I replaced all four ROM sockets and ROM chips, tested
each individual line for resistance (0.5 ohms on all apart from an
occasional 0.4 and 0.6) but still get ghost readings.
Is it me or the cheap clones?
Well, these lines likely have pulses, and depending
on when
they are sampled, you can get a high, low, or indeterminate
state. Also, the LA may have fixed threshold voltages that
may not correspond to the actual thresholds of the logic you
are testing.
Generally, you would clock the LA off some master clock in
the unit under test.
Jon
2 Feb
2 Feb
10:24 a.m.
On 02/02/2017 03:13, "Jon Elson" <elson at pico-systems.com> wrote:
On 02/01/2017 05:18 PM, Adrian Graham wrote:
True, but one is adjustable for either 3.3v or 5v threshold while the other
is fixed 5v. Also you'd expect that sampling at four times the clock speed
(they'll both do 25Mhz with 6 channels) then every pulse would be picked up.
Evening folks,
I have two so-called Logic Analysers, both cheap Chinese clones of other
more expensive units that hook up to the host via USB2 and stream readings
direct to software, in one case the open source Sigrok and in the other
genuine Saleae Logic.
I'm getting different and inconsistent readings out of both of them whilst
sampling at 25MHz which should be more than enough for this 6MHz Executel
I'm working on. Both of them are good for spotting dead or stuck outputs but
I still can't get a good set of readings from eg all points on a single
address line. Tonight I replaced all four ROM sockets and ROM chips, tested
each individual line for resistance (0.5 ohms on all apart from an
occasional 0.4 and 0.6) but still get ghost readings.
Is it me or the cheap clones?
Well, these lines likely have pulses, and depending
on when
they are sampled, you can get a high, low, or indeterminate
state. Also, the LA may have fixed threshold voltages that
may not correspond to the actual thresholds of the logic you
are testing. Generally, you would clock the LA off some master
clock in
the unit under test.
Yeah, neither of them will do that. Units with external clock capability are
over the ukp100 mark which initially was far more than I was comfortable
paying when I wasn't sure about how it all worked. For troubleshooting CBM
PETs the cheapy one worked fine.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
10:43 a.m.
I bought a used 1662 off eBay for cheap, and it has been indispensable for the work
I've been doing on a PDP-11. I think the external clock is often a pretty critical
feature in being able to sensibly interpret traces. Sophisticated triggering is also very
useful for catching a suspected misbehaving chip in the act.
I had considered some of the more modern USB options at the time because it seemed they
would be convenient, but in the end I opted for a used old-school tool because it had the
features I needed at less actual cost. I have not regretted the decision -- super useful
tool!
--FritzM.
11:11 a.m.
On 02/02/2017 18:43, "Fritz Mueller" <fritzm at fritzm.org> wrote:
I bought a used 1662 off eBay for cheap, and it has
been indispensable for the
work I've been doing on a PDP-11. I think the external clock is often a
pretty critical feature in being able to sensibly interpret traces.
Sophisticated triggering is also very useful for catching a suspected
misbehaving chip in the act.
I had considered some of the more modern USB options at the time because it
seemed they would be convenient, but in the end I opted for a used old-school
tool because it had the features I needed at less actual cost. I have not
regretted the decision -- super useful tool!
Cheers Fritz, given that I'll only ever be working on this era kit I too
think the old-skool approach might be better.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
3:21 p.m.
On Feb 2, 2017, at 10:43 AM, Fritz Mueller <fritzm at fritzm.org> wrote:
I bought a used 1662 off eBay for cheap, and it has been indispensable for the work
I've been doing on a PDP-11. I think the external clock is often a pretty critical
feature in being able to sensibly interpret traces. Sophisticated triggering is also very
useful for catching a suspected misbehaving chip in the act.
I had considered some of the more modern USB options at the time because it seemed they
would be convenient, but in the end I opted for a used old-school tool because it had the
features I needed at less actual cost. I have not regretted the decision -- super useful
tool!
My HP 1660CS with Ethernet has ensured I?m not even remotely interested in one of the USB
options, between having 136 channels and way higher bandwidth.
Even one of the models without Ethernet would be worthwhile since they?re straightforward
to interface with via serial or GPIB.
-- Chris
3:49 p.m.
On 2/2/2017 5:21 PM, Chris Hanson wrote:
On Feb 2, 2017, at 10:43 AM, Fritz Mueller <fritzm
at fritzm.org> wrote:
Hmm, I'm not sure I'd say that. I have a 1650, but the memory depth is
not enough to quickly grab issues. A Logic or Logic 16 can dump a ton
of data into the PC, where it is easy to look at.
Jim
--
Jim Brain
brain at jbrain.com
www.jbrain.com
I bought a used 1662 off eBay for cheap, and it
has been indispensable for the work I've been doing on a PDP-11. I think the external
clock is often a pretty critical feature in being able to sensibly interpret traces.
Sophisticated triggering is also very useful for catching a suspected misbehaving chip in
the act.
I had considered some of the more modern USB options at the time because it seemed they
would be convenient, but in the end I opted for a used old-school tool because it had the
features I needed at less actual cost. I have not regretted the decision -- super useful
tool!
My HP 1660CS with Ethernet has ensured I?m not even remotely interested in
one of the USB options, between having 136 channels and way higher bandwidth.
Even one of the models without Ethernet would be worthwhile since they?re straightforward
to interface with via serial or GPIB.
-- Chris
4:01 p.m.
On 02/02/2017 23:49, "Jim Brain" <brain at jbrain.com> wrote:
On 2/2/2017 5:21 PM, Chris Hanson wrote:
My chinese clone is of a Logic 16, I couldn't afford a genuine one since
they're ukp500 at least. Obviously caveat emptor, but that's out of my
league as a hobbyist.
Currently looking at HP1670G's in the US since they're reasonable assuming
the shipping and import charges are as quoted. Also a fellow collector is
loaning me a zeroplus 16 channel to try so that's another avenue to explore,
and there's the DSLogic Pro too which was supposed to be open hardware/open
source but development on that one stalled in 2015 and the current lot on
e*ay seem to be clones too.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
On Feb 2, 2017, at 10:43 AM, Fritz Mueller
<fritzm at fritzm.org> wrote:
Hmm, I'm not sure I'd say that. I have a 1650, but the memory depth is
not enough to quickly grab issues. A Logic or Logic 16 can dump a ton
of data into the PC, where it is easy to look at. I bought a used 1662 off eBay for cheap, and it
has been indispensable for
the work I've been doing on a PDP-11. I think the external clock is often a
pretty critical feature in being able to sensibly interpret traces.
Sophisticated triggering is also very useful for catching a suspected
misbehaving chip in the act.
I had considered some of the more modern USB options at the time because it
seemed they would be convenient, but in the end I opted for a used
old-school tool because it had the features I needed at less actual cost. I
have not regretted the decision -- super useful tool!
My HP 1660CS with Ethernet
has ensured I?m not even remotely interested in
one of the USB options, between having 136 channels and way higher bandwidth.
Even one of the models without Ethernet would be worthwhile since they?re
straightforward to interface with via serial or GPIB.
-- Chris
5:59 p.m.
OK, I'm going to give the minimalist/cheap-bastard perspective. I've done
some solid troubleshooting with my HP 1630G. Sure, it only has a 1K event
memory, but the triggering options are pretty flexible. With some
creativity, you can focus on the behavior you need to observe. It can
self-clock or externally clock, with three separate clock inputs. I've
used it to find some pretty obscure race conditions (one-shots are evil!)
and glitches.
Full disclosure: I do also have a really nice 16700-series I got from Glen
Slick, but for some things the easy setup of the 1630G wins. -- Ian
--
Ian S. King, MSIS, MSCS, Ph.D. Candidate
The Information School <http://ischool.uw.edu>
Dissertation: "Why the Conversation Mattered: Constructing a Sociotechnical
Narrative Through a Design Lens
Archivist, Voices From the Rwanda Tribunal <http://tribunalvoices.org>
Value Sensitive Design Research Lab <http://vsdesign.org>
University of Washington
There is an old Vulcan saying: "Only Nixon could go to China."
6:28 p.m.
On 02/02/2017 05:59 PM, Ian S. King wrote:
OK, I'm going to give the minimalist/cheap-bastard
perspective. I've
done some solid troubleshooting with my HP 1630G. Sure, it only has a
1K event memory, but the triggering options are pretty flexible.
With some creativity, you can focus on the behavior you need to
observe. It can self-clock or externally clock, with three separate
clock inputs. I've used it to find some pretty obscure race
conditions (one-shots are evil!) and glitches.
No, you're a really cheap bastard if you use a PC printer port as your
logic analyzer. Believe it or not, there's software out there for that.
--Chuck
6:43 p.m.
On 2/2/2017 7:28 PM, Chuck Guzis wrote:
On 02/02/2017 05:59 PM, Ian S. King wrote:
I say if it meets your needs, go for it.
Ben.
OK, I'm going to give the
minimalist/cheap-bastard perspective. I've
done some solid troubleshooting with my HP 1630G. Sure, it only has a
1K event memory, but the triggering options are pretty flexible.
With some creativity, you can focus on the behavior you need to
observe. It can self-clock or externally clock, with three separate
clock inputs. I've used it to find some pretty obscure race
conditions (one-shots are evil!) and glitches.
No, you're a really cheap bastard if you use a PC printer port as your
logic analyzer. Believe it or not, there's software out there for that.
--Chuck 
3 Feb
3 Feb
12:01 a.m.
On Thu, 2 Feb 2017, Adrian Graham wrote:
is fixed 5v. Also you'd expect that sampling at
four times the clock speed
(they'll both do 25Mhz with 6 channels) then every pulse would be picked up.
No, because the pulse length may be far inferiour to the sample clock
rate. You may also need to capture signal transitions instead of signal
levels (i.e. you record a "pulse" if there was a transition between two
sample clock pulses).
Christian
12:55 a.m.
On 03/02/2017 08:01, "Christian Corti" <cc at
informatik.uni-stuttgart.de>
wrote:
On Thu, 2 Feb 2017, Adrian Graham wrote:
Ah yes, sorry, I'm aware of that. What I meant in this specific case is that
with 4 2764s right next to each other with a direct signal path between
adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for example) A4 address line
and see the same pulse at all four channels?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
is fixed 5v. Also you'd expect that sampling
at four times the clock speed
(they'll both do 25Mhz with 6 channels) then every pulse would be picked up.
No, because the pulse length may be far inferiour to the sample clock
rate. You may also need to capture signal transitions instead of signal
levels (i.e. you record a "pulse" if there was a transition between two
sample clock pulses). 
7:27 a.m.
On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
<witchy at binarydinosaurs.co.uk> wrote:
Ah yes, sorry, I'm aware of that. What I meant in
this specific case is that
with 4 2764s right next to each other with a direct signal path between
adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for example) A4 address line
and see the same pulse at all four channels?
Yes, subject to the following unlikely cases :
1) There is a standing wave developed between the pins. Technically that trace
is a transmission line. I have never heard it happen between ICs next to each
other at 8-bit micro speeds though.
2) There is a bad connection (IC socket?) on one of the pins
3) If you have a very fast logic analyser you might be able to see the
propagation delay as the signal gets to each pin (remember a foot is about
a nanosecond. So you are talking 10s of picoseconds delay). You will not
see that with the sort of analyser you or I have :-)
If you try your test with 4 of your logic analyser channels on the A4 pins of
the EPROMs, I assume you get different traces for each channel -- that is
what you are commenting on. What happens if you swap the logic analyser
channels round?
Incidentally, I'd better comment on the Logic Analysers I use. I use them
a lot more than a 'scope, but that's because of what I generally need to do.
1) (Is is an LA?) The HP LogicDart. 3 Channels, 100MHz. No external clock
facility. But it is pocket sized. HP called it the 'advanced logic
proble' and that's
really what it is. A better version of the blinking-light probe I used
to use. Great for
checking clocks, power supply voltages (it has a voltmeter function),
serial data
streams, etc. Normally the first instrument I grab for an unknown logic problem
just to eliminate the 'sillies'
2) An old Gould-Biomation K100D. 16 channels 100MHz. with external clocking. I
do have the 32 channel adapter for it which can only work with an
external clock.
This was my first LA and I still have a soft spot for it.
3) An HP1630. I forget which one, probably a 1630G. It does all I
want. I was also
AFAIK the last HP LA to have a proper component-level service manual. It's also
a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT is scanned
vertically, I have no idea why.
-tony
8:46 a.m.
Different strokes for different folks.
I've only used a logic analyzer once and even for that I found
it cumbersome and inadequate. I needed it to solve a sequential
problem that had a lot of time sequential actions.
Things like is does this, then this, then that. Ignore it and restart
if it does this and then something else.
I find that I can work faster with a 'scope. If I have issues with
something not of the bus or processor, most things have EPROMs
and I write test code.
Most logic analyzers are not real good at showing voltages.
Contention on a bus may be missed.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Tony Duell
<ard.p850ug1 at gmail.com>
Sent: Friday, February 3, 2017 7:27:07 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
<witchy at binarydinosaurs.co.uk> wrote:
Ah yes, sorry, I'm aware of that. What I meant in
this specific case is that
with 4 2764s right next to each other with a direct signal path between
adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for example) A4 address line
and see the same pulse at all four channels?
Yes, subject to the following unlikely cases :
1) There is a standing wave developed between the pins. Technically that trace
is a transmission line. I have never heard it happen between ICs next to each
other at 8-bit micro speeds though.
2) There is a bad connection (IC socket?) on one of the pins
3) If you have a very fast logic analyser you might be able to see the
propagation delay as the signal gets to each pin (remember a foot is about
a nanosecond. So you are talking 10s of picoseconds delay). You will not
see that with the sort of analyser you or I have :-)
If you try your test with 4 of your logic analyser channels on the A4 pins of
the EPROMs, I assume you get different traces for each channel -- that is
what you are commenting on. What happens if you swap the logic analyser
channels round?
Incidentally, I'd better comment on the Logic Analysers I use. I use them
a lot more than a 'scope, but that's because of what I generally need to do.
1) (Is is an LA?) The HP LogicDart. 3 Channels, 100MHz. No external clock
facility. But it is pocket sized. HP called it the 'advanced logic
proble' and that's
really what it is. A better version of the blinking-light probe I used
to use. Great for
checking clocks, power supply voltages (it has a voltmeter function),
serial data
streams, etc. Normally the first instrument I grab for an unknown logic problem
just to eliminate the 'sillies'
2) An old Gould-Biomation K100D. 16 channels 100MHz. with external clocking. I
do have the 32 channel adapter for it which can only work with an
external clock.
This was my first LA and I still have a soft spot for it.
3) An HP1630. I forget which one, probably a 1630G. It does all I
want. I was also
AFAIK the last HP LA to have a proper component-level service manual. It's also
a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT is scanned
vertically, I have no idea why.
-tony
9:06 a.m.
On Fri, Feb 3, 2017 at 4:46 PM, dwight <dkelvey at hotmail.com> wrote:
Different strokes for different folks.
Yes. It depends a lot on what you work on, what you are trying to do, and
how you think.
This is a problem with mailing lists. There are many knowledgeable people
here, but each has their own way of doing things. All are right. But a person
trying to learn is going to get conflicting advice. Not because anyone is
being unkind, but because what they say is what they do, it works for them.
There is no one 'right way' to do this. Any way that finds the problem (and
that you know has found the problem!) is OK. Any instrument is just a way
of finding out what the device under test is actually doing. Faultfinding should
then consist of comparing that to what the device should be doing and
working out what could cause the differences.
Needless to say I would not want an LA if I was repairing an SMPSU. I'd use
a 'scope. But a lot of what I work on involves investigate a processor or a
complex interface controller (possibly microcoded, so in a sense a special-
purpose processor) at gate level. Believe me, you do not want to try to
debug an HP9800 (bit serial, microcoded, downright odd in places) with
a 'scope...
-tony
11:04 a.m.
I think Tony's statement about the key thing to know about
trouble shouting is to know what it should be doing.
If you don't know that, no scope or logic analyzer with help much.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Tony Duell
<ard.p850ug1 at gmail.com>
Sent: Friday, February 3, 2017 9:06:34 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On Fri, Feb 3, 2017 at 4:46 PM, dwight <dkelvey at hotmail.com> wrote:
Different strokes for different folks.
Yes. It depends a lot on what you work on, what you are trying to do, and
how you think.
This is a problem with mailing lists. There are many knowledgeable people
here, but each has their own way of doing things. All are right. But a person
trying to learn is going to get conflicting advice. Not because anyone is
being unkind, but because what they say is what they do, it works for them.
There is no one 'right way' to do this. Any way that finds the problem (and
that you know has found the problem!) is OK. Any instrument is just a way
of finding out what the device under test is actually doing. Faultfinding should
then consist of comparing that to what the device should be doing and
working out what could cause the differences.
Needless to say I would not want an LA if I was repairing an SMPSU. I'd use
a 'scope. But a lot of what I work on involves investigate a processor or a
complex interface controller (possibly microcoded, so in a sense a special-
purpose processor) at gate level. Believe me, you do not want to try to
debug an HP9800 (bit serial, microcoded, downright odd in places) with
a 'scope...
-tony
11:47 a.m.
On Fri, Feb 3, 2017 at 7:04 PM, dwight <dkelvey at hotmail.com> wrote:
I think Tony's statement about the key thing to
know about
trouble shouting is to know what it should be doing.
If you don't know that, no scope or logic analyzer with help much.
Yes. I once explained faultfinding in this way. The technical manual,
schematics, microcode listings, etc should tell you what the device
should be doing. The instruments tell you what it is doing, you need
test instruments becuase you can't directly 'see' electrical signals.
You then have to compare the two and work out what could cause
the problem.
There is no magic box that you plug into a computer and it tells
you 'U5 is faulty'. At least not in general.
As I have said before, the most important piece of test gear is a
brain.
-tony
11:58 a.m.
On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell <ard.p850ug1 at gmail.com> wrote:
There is no magic box that you plug into a computer
and it tells
you 'U5 is faulty'. At least not in general.
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)
12:08 p.m.
On 2/3/2017 11:58 AM, Eric Smith wrote:
On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell
<ard.p850ug1 at gmail.com> wrote:
One of those round ones with an 8 on top with a clear window on the
bottom to tell you the fault? Those work very well.
Thanks
Jim
There is no magic box that you plug into a
computer and it tells
you 'U5 is faulty'. At least not in general.
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)
12:10 p.m.
On Fri, Feb 3, 2017 at 8:08 PM, jim stephens <jwsmail at jwsss.com> wrote:
On 2/3/2017 11:58 AM, Eric Smith wrote:
I am not sure those are common this side of the Pond. I assume it's some
kind of fortune telling device that perhaps contains a polyhedron with
a different
fortune on each face or something?
-tony
On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell <ard.p850ug1 at gmail.com> wrote:
One of those round ones with an 8 on top with a clear window on the bottom
to tell you the fault? Those work very well. There is no magic box that you plug into a
computer and it tells
you 'U5 is faulty'. At least not in general.
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)
12:09 p.m.
On Fri, Feb 3, 2017 at 7:58 PM, Eric Smith <spacewar at gmail.com> wrote:
On Fri, Feb 3, 2017 at 12:47 PM, Tony Duell
<ard.p850ug1 at gmail.com> wrote:
Yes, OK, I am sure the HP calculator sitting alongside me could be
programmed to display that message :-). It won't help in actually finding
which IC _is_ faulty though.....
-tony
There is no magic box that you plug into a
computer and it tells
you 'U5 is faulty'. At least not in general.
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-) 
12:25 p.m.
On Fri, 3 Feb 2017, Eric Smith wrote:
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)
Other than plugging in to the computer (USB?), the rest of it could
probably be done in software.
What would the "System Requirements" be?
Would it also advise me that both my hardware and my OS are out-of-date,
and need to be upgraded?
--
Grumpy Ol' Fred cisin at xenosoft.com
12:43 p.m.
On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin <cisin at xenosoft.com> wrote:
On Fri, 3 Feb 2017, Eric Smith wrote:
I'd prefer having a physical piece of hardware. That way I feel like I've
gotten something for my money.
Hmmm...
I think I'll make a box that you plug into a computer and it tells you 'U5
is faulty'.
It won't be magic, though...
:-)
Other than plugging in to the computer (USB?), the rest of it could
probably be done in software.
What would the "System Requirements" be?
Would it also advise me that both my hardware and my OS are out-of-date,
and need to be upgraded?
I'll add that in a future upgrade (for more $).
I'm also considering a space-rated version, which will be able to detect
faults in Alpha Echo Three Five units.
12:51 p.m.
On Fri, Feb 3, 2017 at 12:43 PM, Eric Smith <spacewar at gmail.com> wrote:
On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin <cisin
at xenosoft.com> wrote:
It can only be attributable to human error.
What would the "System Requirements"
be?
Would it also advise me that both my hardware and my OS are out-of-date,
and need to be upgraded?
I'll add that in a future upgrade (for more $).
I'm also considering a space-rated version, which will be able to detect
faults in Alpha Echo Three Five units.
1 p.m.
I once worked with a device that came close to telling you
that U15 was failing.
It was called a signature analyzer.
It was good as a first pass production tester.
It was not something I'd expect a hobbyist to use.
It needed a pin bed to match the board under test.
It wasn't good enough to catch the bypass capacitor
tied to a buss feedthru.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Charles Anthony
<charles.unix.pro at gmail.com>
Sent: Friday, February 3, 2017 12:51:32 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On Fri, Feb 3, 2017 at 12:43 PM, Eric Smith <spacewar at gmail.com> wrote:
On Fri, Feb 3, 2017 at 1:25 PM, Fred Cisin <cisin
at xenosoft.com> wrote:
It can only be attributable to human error.
What would the "System Requirements"
be?
Would it also advise me that both my hardware and my OS are out-of-date,
and need to be upgraded?
I'll add that in a future upgrade (for more $).
I'm also considering a space-rated version, which will be able to detect
faults in Alpha Echo Three Five units.
1:12 p.m.
On Fri, Feb 3, 2017 at 2:00 PM, dwight <dkelvey at hotmail.com> wrote:
I once worked with a device that came close to telling
you
that U15 was failing.
It was called a signature analyzer.
It was good as a first pass production tester.
It required that the device under test be put in a state where the signals
had predictable waveforms, since it basically was just computing a 16-bit
hash of samples of the waveforms, referenced to clock and start signals.
Typically the device under test would be put in a special signature test
mode to do that.
It needed a pin bed to match the board under test.
For automated full-board testing, yes. But signature testing was also used
with a probe on individual signals for field diagnostic purposes.
12:38 p.m.
On 2017-02-03 3:47 PM, Tony Duell wrote:
On Fri, Feb 3, 2017 at 7:04 PM, dwight <dkelvey at
hotmail.com> wrote:
...And if you don't have a schematic, you ring out the connections and
draw your own...
Paul.
I think Tony's statement about the key thing
to know about
trouble shouting is to know what it should be doing.
If you don't know that, no scope or logic analyzer with help much.
Yes. I once
explained faultfinding in this way. The technical manual,
schematics, microcode listings, etc should tell you what the device
should be doing. The instruments tell you what it is doing, you need
test instruments becuase you can't directly 'see' electrical signals.
You then have to compare the two and work out what could cause
the problem.
There is no magic box that you plug into a computer and it tells
you 'U5 is faulty'. At least not in general.
As I have said before, the most important piece of test gear is a
brain.
-tony
12:41 p.m.
...And if you don't have a schematic, you ring out the connections and draw
your own...
Given the number of times I've done that, I half-feel like mentioning
a grandmother
and sucking eggs ;-)
More seriously, to draw out a useful schematic -- not just one that
shows what is
connected to what, but also groups related sections together, also
requres a good
understanding of the device, of what is likely to be going on, etc. In
other words that
brain comes in handy...
-tony
1:28 p.m.
On 2017-02-03 4:41 PM, Tony Duell wrote:
Without a doubt the brain is the most important tool..... in my day job
of providing advise on fixing equipment, not component level mind you,
you quickly learn who is equipped with this tool and who is not.
Paul.
...And if you
don't have a schematic, you ring out the connections and draw
your own...
Given the number of times I've done that, I half-feel like
mentioning
a grandmother
and sucking eggs ;-)
More seriously, to draw out a useful schematic -- not just one that
shows what is
connected to what, but also groups related sections together, also
requres a good
understanding of the device, of what is likely to be going on, etc. In
other words that
brain comes in handy...
-tony
1:05 p.m.
On 03/02/2017 20:38, "Paul Berger" <phb.hfx at gmail.com> wrote:
I'm not yet skilled enough to draw a schematic but I've drawn out a complete
layout of the board with all chips and traces in an open source design
package called Fritzing. Certainly a big help with wiring up the analyser.
These drawings are the only docs I have however... One thing I'd REALLY like
is a memory map but maybe the original designer of this machine will come up
trumps soon.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
As I have said
before, the most important piece of test gear is a
brain.
-tony
...And if you don't have a schematic, you ring out the connections and
draw your own...
1:35 p.m.
On 2017-02-03 5:05 PM, Adrian Graham wrote:
On 03/02/2017 20:38, "Paul Berger"
<phb.hfx at gmail.com> wrote:
I'm not yet skilled enough to draw a schematic but I've
drawn out a complete
layout of the board with all chips and traces in an open source design
package called Fritzing. Certainly a big help with wiring up the analyser.
These drawings are the only docs I have however... One thing I'd REALLY like
is a memory map but maybe the original designer of this machine will come up
trumps soon.
Well if that does not work out the approach I would take is work
backwards from the chip select on the memory and I/O devices, things
that may throw you off are if PLDs or ROMs are used as part of the
logic. Chip select logic is usually pretty straight forward. As has
been discussed before I/O on a 8085 may be in a seperate address space
of might mapped into the I/O space. IO/-M selects between the two
address spaces.
Paul.
As I have
said before, the most important piece of test gear is a
brain.
-tony
...And if you don't have a schematic, you ring out the connections and
draw your own...
10:39 a.m.
On 03/02/2017 15:27, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
On Fri, Feb 3, 2017 at 8:55 AM, Adrian Graham
<witchy at binarydinosaurs.co.uk> wrote:
That was my first thought so there's nice new turned pin sockets on there
now. I did find one connection on the data bus that was held together by
solder and luck so fixed that with a small piece of jumper wire.
Ah yes, sorry, I'm aware of that. What I
meant in this specific case is that
with 4 2764s right next to each other with a direct signal path between
adjacent address and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for example) A4 address line
and see the same pulse at all four channels?
Yes, subject to the following unlikely cases :
1) There is a standing wave developed between the pins. Technically that trace
is a transmission line. I have never heard it happen between ICs next to each
other at 8-bit micro speeds though.
2) There is a bad connection (IC socket?) on one of the pins 3) If you have a very fast logic analyser you might be
able to see the
propagation delay as the signal gets to each pin (remember a foot is about
a nanosecond. So you are talking 10s of picoseconds delay). You will not
see that with the sort of analyser you or I have :-)
I wondered about that but the fastest I can go is 25Mhz, also the
missing/extra signals are across (in this case) 6 channels and don't go in
channel order, so there'll be a missing pulse on channels 1+2 or channel 4
or an extra one on 2+5 etc. I'm watching the output pins on an LS373
flip-flop (new socket+chip) and the corresponding ROMs (all new
sockets+chips) along with an LS21N in the decoding circuit.
If you try your test with 4 of your logic analyser
channels on the A4 pins of
the EPROMs, I assume you get different traces for each channel -- that is
what you are commenting on. What happens if you swap the logic analyser
channels round?
I thought of that the other day, also swapped the grabber ends since they're
not the sturdiest of things. I haven't tried a PC though, my host is an
iMac.
Hopefully next week I'll have a Zeroplus to try which while still being USB
attach is 16CH+external clock and onboard RAM for storage. Could be useful.
Incidentally, I'd better comment on the Logic
Analysers I use. I use them
a lot more than a 'scope, but that's because of what I generally need to do.
<snip> Ah, someone else with an HP16xx. This is making me think I should
join the club.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
11:35 a.m.
> the propagation delay as the signal gets to each
pin (remember a
> foot is about a nanosecond. [...])
Not really. A foot is about a light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.
It's still on the general order of c, mind you; for the purposes of
this discussion, c and .5c - even .1c - are much the same.
/~\ The ASCII Mouse
\ / Ribbon Campaign
X Against HTML mouse at rodents-montreal.org
/ \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B
11:43 a.m.
On Fri, Feb 3, 2017 at 7:35 PM, Mouse <mouse at rodents-montreal.org> wrote:
It's not really the skin effect that matters here. It's the dielectric
medium that surrounds the conductors that effectively slows the
fields down.
But that's why I said 'about'. I am doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
> the
propagation delay as the signal gets to each pin (remember a
> foot is about a nanosecond. [...])
Not really. A foot is about a light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.
It's still on the general order of c, mind you; for the purposes of
this discussion, c and .5c - even .1c - are much the same.
Exactly.
-tony
11:51 a.m.
On Feb 3, 2017, at 2:43 PM, Tony Duell <ard.p850ug1
at gmail.com> wrote:
On Fri, Feb 3, 2017 at 7:35 PM, Mouse <mouse at rodents-montreal.org> wrote:
It's not really the skin effect that matters here. It's the dielectric
medium that surrounds the conductors that effectively slows the
fields down.
Yes. Consider open wire transmission line, which has a velocity factor around 98%. Or
air dielectric coax, similarly high value. The smaller numbers. like 66%, are found in
traditional solid-dielectric (not foam) coax cable.
paul
> the
propagation delay as the signal gets to each pin (remember a
> foot is about a nanosecond. [...])
Not really. A foot is about a light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.
2:34 p.m.
On 03/02/2017 19:43, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
But that's why I said 'about'. I am doing
order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
3:29 p.m.
Adrian
What you see on the other select line is what is called a glitch.
These are not that uncommon during the early part of the address.
What is important is that there are no glitchs when ALE transitions.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 2:34:18 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 19:43, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
But that's why I said 'about'. I am doing
order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
3:46 p.m.
On 03/02/2017 23:29, "dwight" <dkelvey at hotmail.com> wrote:
Adrian
What you see on the other select line is what is called a glitch.
These are not that uncommon during the early part of the address.
What is important is that there are no glitchs when ALE transitions.
Ah, ok, there's a glitch filter that I can apply to each channel, I'll
explore that.
Cheers!
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 2:34:18 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 19:43, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
4:10 p.m.
I'm not sure you want to hide glitches. There are times
when you might want to see them.
It is more about knowing when a glitch has meaning and when it doesn't.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 3:46:32 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 23:29, "dwight" <dkelvey at hotmail.com> wrote:
Adrian
What you see on the other select line is what is called a glitch.
These are not that uncommon during the early part of the address.
What is important is that there are no glitchs when ALE transitions.
Ah, ok, there's a glitch filter that I can apply to each channel, I'll
explore that.
Cheers!
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 2:34:18 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 19:43, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
4:42 p.m.
On 02/03/2017 04:10 PM, dwight wrote:
I'm not sure you want to hide glitches. There are
times
when you might want to see them.
It is more about knowing when a glitch has meaning and when it
doesn't.
Indeed. That's one of the the things that impressed me about the early
HP 1615 logic analyzer--it had a glitch detector. Glitches can be
maddeningly difficult to find using traditional (i.e. 'scope) methods.
--Chuck
6:36 p.m.
On 02/03/2017 04:34 PM, Adrian Graham wrote:
On 03/02/2017 19:43, "Tony Duell"
<ard.p850ug1 at gmail.com> wrote:
First pic, pulses are missing from ROMs 1-3, seen on ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches. Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like. The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period). You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer. So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch. Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches. I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this. Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.
Jon
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
9:40 p.m.
All the glitches are at the beginning of the ALE. There is nothing
there that has any meaning. Things are changing at this time. Not
every thing changes at the same rate. That is why they have an
ALE to mark when the address is good. When high, the circuit address
latch is open. When ALE goes low, it captures the address.
You really should be looking at the processor timing diagram and
understand what you are looking at.
Technically a glitch at the beginning of the ALE can last until
some nanoseconds before the falling edge and the circuit would
work fine. These glitches are much shorter than the ALE and
clearly not an issue.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Jon Elson <elson at
pico-systems.com>
Sent: Friday, February 3, 2017 6:36:27 PM
To: General at classiccmp.org; Discussion@
Subject: Re: Logic Analysers
On 02/03/2017 04:34 PM, Adrian Graham wrote:
On 03/02/2017 19:43, "Tony Duell"
<ard.p850ug1 at gmail.com> wrote:
First pic, pulses are missing from ROMs 1-3, seen on
ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches. Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like. The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period). You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer. So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch. Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches. I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this. Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.
Jon
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
9:44 p.m.
Remember what both Tony and I said earlier. You have to know
what is suppose to be happening. Just probing around, looking
for something funny looking is not usually very fruitful.
You really need to spend some time looking at data sheets.
Dwight
________________________________
From: dwight <dkelvey at hotmail.com>
Sent: Friday, February 3, 2017 9:40:48 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
All the glitches are at the beginning of the ALE. There is nothing
there that has any meaning. Things are changing at this time. Not
every thing changes at the same rate. That is why they have an
ALE to mark when the address is good. When high, the circuit address
latch is open. When ALE goes low, it captures the address.
You really should be looking at the processor timing diagram and
understand what you are looking at.
Technically a glitch at the beginning of the ALE can last until
some nanoseconds before the falling edge and the circuit would
work fine. These glitches are much shorter than the ALE and
clearly not an issue.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Jon Elson <elson at
pico-systems.com>
Sent: Friday, February 3, 2017 6:36:27 PM
To: General at classiccmp.org; Discussion@
Subject: Re: Logic Analysers
On 02/03/2017 04:34 PM, Adrian Graham wrote:
On 03/02/2017 19:43, "Tony Duell"
<ard.p850ug1 at gmail.com> wrote:
First pic, pulses are missing from ROMs 1-3, seen on
ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches. Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like. The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period). You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer. So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch. Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches. I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this. Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.
Jon
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
4 Feb
4 Feb
2:55 a.m.
On 04/02/2017 05:40, "dwight" <dkelvey at hotmail.com> wrote:
All the glitches are at the beginning of the ALE.
There is nothing
there that has any meaning. Things are changing at this time. Not
every thing changes at the same rate. That is why they have an
ALE to mark when the address is good. When high, the circuit address
latch is open. When ALE goes low, it captures the address.
You really should be looking at the processor timing diagram and
understand what you are looking at.
I'm doing that right now as it happens, I've got a dead tree edition of the
MCS85 User Manual that has all the timings in and I'm trying to match them
with what the CPU is doing. What I've been thinking is happening is because
the traces I'm seeing don't match exactly on screen then there's a problem
but of course as long as the transitions are happening within the right time
frame there isn't a problem.
Technically a glitch at the beginning of the ALE can last until
some nanoseconds before the falling edge and the circuit would
work fine. These glitches are much shorter than the ALE and
clearly not an issue.
So I'm looking too deeply, OK.
Back to the books for me then :)
A
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Jon Elson
<elson at pico-systems.com>
Sent: Friday, February 3, 2017 6:36:27 PM
To: General at classiccmp.org; Discussion@
Subject: Re: Logic Analysers
On 02/03/2017 04:34 PM, Adrian Graham wrote:
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
On 03/02/2017 19:43, "Tony Duell"
<ard.p850ug1 at gmail.com> wrote:
First pic, pulses are missing from ROMs 1-3, seen on
ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches. Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like. The LA
detects that the pulse was there at the instant it sampled
it, but you don't know whether it was 5 ns wide, or 70 ns
wide (with a 40 ns sampling period). You also don't know
whether they were full-amplitude pulses or runts that just
barely crossed the logic threshold of the analyzer. So, I'm
not sure what you've shown there actually represents a
problem or not. Especially on the 2nd picture, the pulses
you have highlighted really look like a single sample wide,
and if the logic levels of the analyzer are not exactly the
same, or other slight deviation, it could have missed a
narrow glitch. Anyway, on old 8-bit micro gear, there may
be plenty of narrow glitches in the 40 ns range, but the
operation of the chips is most likely NOT going to depend on
the circuits responding to such glitches. I think you are
chasing your tail about these things, and missing a real
malfunction that is not related to this. Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.
Jon
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
2:44 a.m.
On 04/02/2017 02:36, "Jon Elson" <elson at pico-systems.com> wrote:
Gotcha, I forget that any circuit can be a haven of noise and like you say
the LA is just detecting that there's something there at that point in time.
The fact that the logic software even has a 'glitch filter' on each channel
should've given me a clue.
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
First pic, pulses are missing from ROMs 1-3, seen on
ROM4.
But, those pulses on ROM4 are really narrow, and may be
noise, or very narrow glitches. Any time you see really
narrow glitches, especially when they are one LA sample
wide, you have no idea what they actually look like. The LA the circuits responding to such glitches. I think you
are
chasing your tail about these things, and missing a real
malfunction that is not related to this. Could be EPROM
bits that have faded, one shot capacitors that have changed
value or something.
I've tested all the caps apart from the .47uF decoupling ones and replaced
the dead or out-of-spec ones. This week I replaced all the ROMs with 'new'
2764s and changed the old sockets, I discovered that two of the original
ROMs had gone open circuit. Fortunately I'd dumped them beforehand.
I'll keep chipping away :)
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
3 Feb
3 Feb
6:20 p.m.
On 02/03/2017 01:35 PM, Mouse wrote:
Well, actually, it depends on the impedance. So, 50 Ohm
coax cable is .6 C, twisted pair differential cable is 120
Ohms, and the propagation velocity is a little above .7 I
think. Wires in open space are faster, around .8 or so, but
the signal quality may be poor.
Jon
> the
propagation delay as the signal gets to each pin (remember a
> foot is about a nanosecond. [...])
Not really. A foot is about a
light-nanosecond, yes, but
high-frequency signals in copper travel by skin effect, moving
significantly more slowly - somewhere around .6c, I think it is.
1:50 p.m.
3) An HP1630. I forget which one, probably a 1630G. It
does all I want. I was
also AFAIK the last HP LA to have a proper component-level service manual.
It's also a classic computer in its own right (6809 + 6829 MMU). Oddly the CRT
is scanned vertically, I have no idea why.
Hello Tony,
I bought a 1630G a while back. It came with pods, but didn't have the leads that plug
into the pods. I am sure I could make something (in fact I intend to try it out this
weekend if my cold doesn't get the better of me), but if you have any information on
what to search for (model/part number) or know where I might buy some that would be really
useful.
Regards
Rob
8:41 a.m.
On 02/03/2017 02:55 AM, Adrian Graham wrote:
Ah yes, sorry, I'm aware of that. What I meant in
this
specific case is that with 4 2764s right next to each
other with a direct signal path between adjacent address
and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for
example) A4 address line and see the same pulse at all
four channels?
Well, if the two logic analyzers were synched together, or
you were sampling at 100 MHz or above, then yes.
But, if the logic analyzers are running too slow, sampling
irregularly (I have no trust in Chinese gizmos until PROVEN
that they do it right) you could get very different
results. Is there a clock on the microprocessor that you
can check? Maybe something like a baud rate clock or
something that is at a few MHz. See if that shows up as
totally regular square waves. If not, then the LA may not
be sampling at a regular rate, or might have gaps while
sending data to the PC. I'm just suspicious of these units,
given the results you report.
(On my $130,000 Tektronix analyzer, I don't have to worry
about such stupid stuff, I know they got it right. I paid
less than $750 for it, it will do 100 MHz on 288
synchronized channels, with a 128K record length. But, it
is bigger than a big kitchen microwave, and much noisier, too.)
Jon
9:09 a.m.
On 2017-02-03 12:41 PM, Jon Elson wrote:
On 02/03/2017 02:55 AM, Adrian Graham wrote:
Same with my Agilent 16700B, however I current only have 192 channels
available because I have two card slots occupied by digital scope
cards. The analyzer cards I have can do 110 MHz state or 500 MHz timing
which more than meets my needs for the 30-40 year old computers I use it
with. One big advantage of a setup like this is one instrument can be
used to trigger the other, for instance if I want to see what a signal
really looks at at some point, I can use the logic analyzer to trigger
the scope cards. I also really like the external monitor on the 16700,
its nice to work on a 19" display with a regular keyboard and mouse. I
have the 16700 set up with the back facing my work bench which gives me
extra reach with the cable. The only thing I need access to the front
for is the power switch. I do also have a analogue scope but I find
myself using it less these days especially for digital circuits.
I also have a 16700A, 16600A, and a 16500C but they are rarely if ever
used these days.
Paul.
Ah yes, sorry, I'm aware of that. What I
meant in this specific case
is that with 4 2764s right next to each other with a direct signal
path between adjacent address and data pins that has a resistance of
0.5 ohms pin to pin surely I should be able to put a clip on each
(for example) A4 address line and see the same pulse at all four
channels?
Well, if the two logic analyzers were synched together, or you were
sampling at 100 MHz or above, then yes.
But, if the logic analyzers are running too slow, sampling irregularly
(I have no trust in Chinese gizmos until PROVEN that they do it right)
you could get very different results. Is there a clock on the
microprocessor that you can check? Maybe something like a baud rate
clock or something that is at a few MHz. See if that shows up as
totally regular square waves. If not, then the LA may not be sampling
at a regular rate, or might have gaps while sending data to the PC.
I'm just suspicious of these units, given the results you report.
(On my $130,000 Tektronix analyzer, I don't have to worry about such
stupid stuff, I know they got it right. I paid less than $750 for it,
it will do 100 MHz on 288 synchronized channels, with a 128K record
length. But, it is bigger than a big kitchen microwave, and much
noisier, too.)
Jon
10:44 a.m.
On 2017-02-03 1:23 PM, jim stephens wrote:
On 2/3/2017 9:09 AM, Paul Berger wrote:
Yep that is why I got it, its hard to image 192 channel + 12 clocks not
being enough it would be better is they where deep memory like the cards
in my 16700B but you can't have everything. Since it is the same CPU
card I moved the option 3 card from the 16700A into it when I took the
16700A out of service. I also had an extra 10?100 card from a 16700B I
think I may have stuck it in there too. The 10/100 card will work in an
A but you need to remove the RJ45 connector that is on the CPU card.
Paul.
I also have a 16700A, 16600A, and a 16500C but
they are rarely if
ever used these days.
Paul.
the 16600A has one slot. We had one with a scope card installed, very
nice compact setup if the builtin channels were sufficient.
thanks
jim
10:47 a.m.
On 03/02/2017 16:41, "Jon Elson" <elson at pico-systems.com> wrote:
On 02/03/2017 02:55 AM, Adrian Graham wrote:
Neither of them can go that fast but I didn't think that was necessary since
the system clock on this machine is 6MHz so sampling at 25+ should be
sufficient. If I reduce the number of channels to 6 I can drive one of them
at 50MHz but that didn't seem to make a difference.
Ah yes, sorry, I'm aware of that. What I
meant in this
specific case is that with 4 2764s right next to each
other with a direct signal path between adjacent address
and data pins that has a resistance of 0.5 ohms pin to pin
surely I should be able to put a clip on each (for
example) A4 address line and see the same pulse at all
four channels?
Well, if the two logic analyzers were synched together, or
you were sampling at 100 MHz or above, then yes. totally regular square waves. If not, then the LA may
not
be sampling at a regular rate, or might have gaps while
sending data to the PC. I'm just suspicious of these units,
given the results you report.
So am I :) I mean, the most expensive one was ukp40 direct from China so if
it's not fully accurate I can't really be surprised. I have a Zeroplus
coming next week from another collector who used it on Apple][/PETs as well
as car ECUs with good results. In the meanwhile the external clock signal
from the 8085 on this machine is accessible in 3
locations so I'll try 3
channels and see if it's properly square.
(On my $130,000 Tektronix analyzer, I don't have
to worry
about such stupid stuff, I know they got it right. I paid
less than $750 for it, it will do 100 MHz on 288
synchronized channels, with a 128K record length. But, it
is bigger than a big kitchen microwave, and much noisier, too.)
I'm looking at a lower-end HP/Agilent for around ukp200-250 which should be
enough since I doubt I'll ever work on anything with a clock speed of more
than 8MHz.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
1 Feb
1 Feb
8:26 p.m.
On Wed, Feb 1, 2017 at 3:18 PM, Adrian Graham
<witchy at binarydinosaurs.co.uk> wrote:
Whilst looking for better quality units I came across a couple of 'proper'
HP/Agilent analysers, a 1663A 34 channel and 1661A 102 channel which seem
complete apart from the chip leg grabbers. Am I right to assume some of you
might have experience of these beasts?
An HP 1660 or 1670 series self-contained portable logic analyzer might
be nice to pick up if you can get a decent deal on one. The main
limitation of the 1660 series is that the sample depth is only 4K
samples per channel. The 1670 series offers deeper sample depths, and
they may sell at a higher price as a result. And of course a sub-model
with more channels is better than one with fewer channels.
For debugging something like an 8085 CPU system you could connect up
the analyzer to the CPU and if you capture traces in state mode
(address, data, and status signals clocked in by RD, WR, or INTA
edges) the 8085 inverse assembler software running on the analyzer can
decode the bus transactions into the 8085 instruction stream.
1660A - Mono CRT. 4K sample depth. Floppy only. No LAN.
1660C - Mono CRT. 4K sample depth. Hard drive. LAN optional.
1660E - Color LCD. 4K sample depth. Hard drive. LAN.
1670A - Mono CRT. 64K (optional 500K) sample depth. Hard drive. LAN.
1670D - Mono CRT. 64K (optional 1M) sample depth. Hard drive. LAN.
1670E - Color LCD. 1M sample depth. Hard drive. LAN.
1670G - Color LCD. 64K (optional 256K or 2M) sample depth. Hard drive. LAN.
(Information manually gathered from datasheets, hope it's all correct)
There are also options for built in dual channel oscilloscopes and
pattern generators.
Too bad you're not local. I could make you a good deal on a bigger
16500B system. I have more of those than I need. Unfortunately the
cost to ship one is close to or may even exceed their current market
value, just within the US.
10:50 p.m.
On Wed, Feb 1, 2017 at 3:18 PM, Adrian Graham
<witchy at binarydinosaurs.co.uk> wrote:
The problem with used logic analyzers is that the prices can vary
widely. My 1663 was purchased from eBay for $47 shipped, was clearly
Whilst looking for better quality units I came across a couple of
'proper' HP/Agilent analysers, a 1663A 34 channel and 1661A 102
channel which seem complete apart from the chip leg grabbers. Am I
right to assume some of you might have experience of these beasts?
An HP 1660 or 1670 series self-contained portable logic analyzer
might be nice to pick up if you can get a decent deal on one. The
main limitation of the 1660 series is that the sample depth is only
4K samples per channel. The 1670 series offers deeper sample depths,
and they may sell at a higher price as a result. And of course a
sub-model with more channels is better than one with fewer channels. from a rental service, as it was complete; nothing
missing.
I use an LA less than a 'scope, so the price is right for me. Mostly,
I'm interested in looking at peripheral device timing, so it's perfect
for the occasional head-scratcher.
I remember when we got in the then-new HP 1615 logic analyzer--I was
blown away by it. We were using a Tek lab scope plug-in which was
pretty limited. The idea of a piece of test equipment with a keyboard
and its own display was pure genius. Biomation, IIRC, was also big in
the business, but not nearly as polished as the HP units.
I don't know where you're located, but if you're in a region with an
Electro Rent depot, you might inquire to see if they turn their old gear
over to an auctioneer.
--Chuck
2 Feb
2 Feb
11:08 a.m.
On 02/02/2017 06:50, "Chuck Guzis" <cclist at sydex.com> wrote:
Nice! It seems that there's only one seller one e*ay uk selling ex-MOD
units. There's actually 3 different IDs but the writeups look similar and
the location's the same so...
An HP 1660 or
1670 series self-contained portable logic analyzer
might be nice to pick up if you can get a decent deal on one. The
main limitation of the 1660 series is that the sample depth is only
4K samples per channel. The 1670 series offers deeper sample depths,
and they may sell at a higher price as a result. And of course a
sub-model with more channels is better than one with fewer channels.
The problem with used logic analyzers is that the prices can vary
widely. My 1663 was purchased from eBay for $47 shipped, was clearly
from a rental service, as it was complete; nothing missing. I use an LA less than a 'scope, so the price is
right for me. Mostly,
I'm interested in looking at peripheral device timing, so it's perfect
for the occasional head-scratcher.
My Tek 2225 scope is getting a lot of use on this project, but because I
have zero documentation there's an awful lot of unknowns so following a
signal around the board should be easier with an LA.
I don't know where you're located, but if
you're in a region with an
Electro Rent depot, you might inquire to see if they turn their old gear
over to an auctioneer.
I'm in the increasingly-isolationist and possibly soon to be ringfenced UK.
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
11:02 a.m.
On 02/02/2017 04:26, "Glen Slick" <glen.slick at gmail.com> wrote:
That would be excellent to see, all I can do at the moment is fake an
external clock by using the RD signal and duplicate one of the higher
address lines (A12 currently) to make up for losing one channel since it's
only a 16 channel analyser. Then I run that through a 'simple parallel'
decoder which eventually gives me a set of addresses which happen to match
my disassembled code.
I guess for a sanity check I could watch the CPU on a PET or Apple][ since I
do have the full code listings for those.
Whilst looking for better quality units I came across a couple of 'proper'
HP/Agilent analysers, a 1663A 34 channel and 1661A 102 channel which seem
complete apart from the chip leg grabbers. Am I right to assume some of you
might have experience of these beasts?
For debugging something like an 8085 CPU system you could connect up
the analyzer to the CPU and if you capture traces in state mode
(address, data, and status signals clocked in by RD, WR, or INTA
edges) the 8085 inverse assembler software running on the analyzer can
decode the bus transactions into the 8085 instruction stream. Too bad you're not local. I could make you a good
deal on a bigger
16500B system. I have more of those than I need. Unfortunately the
cost to ship one is close to or may even exceed their current market
value, just within the US.
Indeed, looking at e*ay there's an almost-complete 1670G in the US with
working hard drive that appears to 'just' be missing the pods/grabbers. If
the shipping and import costs are correct the whole thing would cost me
ukp250. For ukp100 less than that I can get a complete 1663A in the UK.
I'm amazed I don't appear to know anyone in the UK with a spare one for sale
:)
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
2659
days inactive
2662
days old
56 comments
20 participants
participants (20)
-
ard.p850ug1＠gmail.com -
bfranchuk＠jetnet.ab.ca -
brain＠jbrain.com -
cc＠informatik.uni-stuttgart.de -
cclist＠sydex.com -
charles.unix.pro＠gmail.com -
cisin＠xenosoft.com -
cmhanson＠eschatologist.net -
dkelvey＠hotmail.com -
elson＠pico-systems.com -
fritzm＠fritzm.org -
glen.slick＠gmail.com -
isking＠uw.edu -
jwsmail＠jwsss.com -
mouse＠Rodents-Montreal.ORG -
paulkoning＠comcast.net -
phb.hfx＠gmail.com -
robert.jarratt＠ntlworld.com -
spacewar＠gmail.com -
witchy＠binarydinosaurs.co.uk