On Feb 27, 2013, at 5:06 PM, Philipp Hachtmann wrote:
Am 27.02.2013 20:57, schrieb David Riley:
There are a lot of discrete or paired FETs that
should do the job of the
driver quite adequately;
I had that idea, too. Even easier to design and -
cheaper.
It does come at the expense of some board space compared to an
integrated transceiver, though with modern SMT devices, not much.
If you're not doing the assembly yourself, that'll cost you as
well. For
the receiver is usually best done with a
high-speed
comparator, which unfortunately tend not to be particularly cheap. The best
one I've found for modern devices is the MAX9108, which fits the required
35ns propagation delay;
35ns is not that fast. But it could work.
35ns is the maximum propagation delay for drivers and receivers
per DEC specs (at least for QBUS and Unibus, so I'd assume any
bus standard which uses DEC transceivers). That's for the whole
chain, so it includes the receiver as well as any buffering
required after it. The MAX9108 has a typical Tpd of 25ns, but
the max isn't specified, which makes me a little uncomfortable.
I'm considering going with the LT1720/1721 (dual and quad of
the same comparator) which have a worst-case Tpd of under 10ns
with the kind of overdrive we're talking about. It also has
the advantage of running at 3.3v CMOS levels, which makes the
design a lot easier if you're talking to modern components. It
does cost about three times as much, though, which isn't great.
it has TTL
outputs (not great for 3.3v logic, but you
can use glue) and costs about $1 per gate ($.50 per in>= 100 qty).
The CPLD
I'm planning to use (the three small ones are result of an "accident" when
estimating the pin consumption) is 5V tolerant.
It'll generally work fine because most CPLDs these days are
designed to work with PCI, so they have 4.0v-capable pins
with clamp diodes to Vcc, so all you need to do is provide
series terms. Very handy, especially considering that TTL
generally only outputs about 3.4ish volts for a high value.
It all still makes me a bit nervous, but that's probably
unfounded worries.
I will keep the current design for now. After building
a prototype of the final board, I'll simply test it in a really loaded 8/e. And then
we'll see if there are reliability issues. I'll also test the system with the card
in place.
If you can, can you get scope traces of your inputs and
outputs? I'm curious to see what they look like, since I
haven't built up my board yet (and I only have a 4-slot
backplane with which to test anyway). As Eric mentioned,
you'd probably want to do it on a 100 MHz bandwidth or
better scope.
Looks like it should be a winner, though! Great work!
- Dave