Oh sure.. because I always thought that SRAM was intrinsically faster than
DRAM, all other factors held constant?
On Sat, May 28, 2016 at 9:16 PM, Brent Hilpert <hilpert at cs.ubc.ca> wrote:
Fewer transistors, hence less die space.
Same reason DRAM is more dense (hence larger) than SRAM.
On 2016-May-28, at 7:12 PM, drlegendre . wrote:
So what's the reasoning behind using gate
capacitance (or inductance) to
store the bit state? It would seem obvious that setting a bi-stable hi or
lo would be a much more reliable method of saving the state.
Is it a matter of power consumption, or switching speed, or both?
On Sat, May 28, 2016 at 8:49 PM, Brent Hilpert <hilpert at cs.ubc.ca>
> On 2016-May-28, at 6:22 PM, drlegendre . wrote:
>> Could someone also clarify what is meant by "gates" in this sense? Are
>> talking about the gates (G) of a FET, as
in Gate, Drain and Source - or
>> we referring to the composite logic gates (NAND, etc.), built up of
>> multiple bipolar - or MOS - transistors?
> Yes, they're talking FET gates, the internal registers would operate
> the same basic principle as DRAM does.
> Other early microprocs used dynamic registers, I forget which, perhaps
> others can list them.
> Far from the first time a processor had dynamic registers.
> I've been told that the IBM 709 used inductive (rather than capacitive)
> storage for the main registers.