On 2 Feb 2012 at 21:10, Brent Hilpert wrote: Good guess, but the power pins don't seem to line up. My best guess is an A-D converter (there's a temperature probe on this oven). --Chuck

On 2 Feb 2012 at 22:44, Brent Hilpert wrote: M7731, so I'm guessing 1977, which would be in line with the date on the MCU (7740). --Chuck

On 2 Feb 2012 at 23:54, Brent Hilpert wrote: It could also be that the part was later renamed. 70's TI parts were a bit of a mish-mash of conventions. I note that the Bi-MOS TL505C was a designed-for-TMS1000 ADC, but haven't checked the pinout yet. --Chuck

On 2012 Feb 3, at 12:12 PM, Henk Gooijen wrote: Yes, Fairchild had a 93xx line of TTL. 9316 was a 4-bit counter, you're probably thinking of the 9368 & 9370 7-seg-hex decoders.

Egh> You ave a 5V supply between ground (+ve) and the -5V rail (-ve). That could bn sued to run TTL. I've not seen the board but I don;t think I can say from what you've told us that there can't be any TTL on the board. You might want to look at the schematic for the original Big Trak. (It's on the web somewhere). That used a TMS1000 processor and a driver IC (to drive the motors, lamp, etc). -tony

You are now giving me additional facts, from which I agree that the unknown IC is not a TTL device. But your original somment that the board used -5V and -15V power lines does not IMHO preclude the use of TTL on it. Agreed. Doesn't sound like any common display driver chip either. -tony

On 04/02/2012 20:17, Tony Duell wrote: Absolutely. A colleague once told me about equipment he worked on in telephone exchanges. He wondered what the -43V supply was for, until he realised it was the power rail for the TTL. The -48V was the "ground" for it. -- Pete Peter Turnbull Network Manager University of York

Well...in a sense. It's a reasonable approximation when dealnig with low voltages, such as generally occur in computers. But there _is_ a measurable-in-isolation ground potential in the sense of "not charged"; if you're working with electrostatics, which usually means (from computer points of view) very high voltages and very low currents, this can matter in a practical sense. Here's another case where "there is no such thing as ground" can fail: what you outline works only if there are other loads on the on-board +10V line that collectively draw more current than the TTL in question does. (Loading internal to the circuit generating it counts.) /~\ The ASCII Mouse \ / Ribbon Campaign X Against HTML mouse at rodents-montreal.org / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B

Please don't use paragraph-length lines. Compensating, Um, doesn't this assume which polarity of transistor you're using? Except for asymmetries in the behaviour of the dopants, I can't see any raeson why any bipolar technology wouldn't work equally well if you swap NPN and PNP, reverse all diodes, and negate all voltages. Am I missing something? This mystifies me. Why would system ground be more stable if you view the power supply as ground-and-negative rather than ground-and-positive? I'm still mystified. How do people treat ground-and-negative power differently from ground-and-positive that makes ground stabler? /~\ The ASCII Mouse \ / Ribbon Campaign X Against HTML mouse at rodents-montreal.org / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B

On Feb 6, 2012, at 12:01 AM, Mouse wrote: Sorry. Still searching for something I like better than Thunderbird, which I'll use over Outlook any day but not Mail.app. Well, it does if you're making emitter-followers. They only drive voltage in the direction of the emitter (so NPN will source strongly while PNP will sink strongly). ECL is designed with a complimentary pair of emitters sourcing a low-differential voltage into a termination pulldown (which is necessary, or you'll only get high voltage, since the emitter-follower won't pull the other way). So in short, yes it does assume the polarity, but ECL defines the polarity. They could have done emitter-followers with PNP if they'd wanted, but I imagine at the time the difference between the dopants would have been extreme enough that you'd get severe enough performance degradation that NPN with a negative Vee was considered worthwhile. It can still be a factor of 2 difference between P-type and N-type these days. It's not. It's just that the long-tailed pair (which ECL uses as the input buffer) isn't as sensitive to noise on Vee (because that just changes the common mode voltage) as it is to noise on the inputs (which you'd get through noise on Vcc). Using ground as Vcc makes for a more stable circuit in this case, assuming ground is a quieter rail than a positive Vcc would be. Again, as above, if you could make PNP transistors that performed as well as NPN, they might have opted for that instead. These days, we use PECL (with NPN drivers) for all sorts of things because transistors are better and the noise margins are good enough that we don't have to worry about that; we worry about having enough current to drive hundreds of MHz over long traces with fast edges (which is why you'll see lots of PECL clock buffers even today). They're not saying that ground is stabler, they're saying that using ground as Vcc is stabler than using a regulated rail as Vcc (which, in any normal system that's not using a daisy-chain of lamp wire for its grounding, is usually true). Wikipedia actually has a pretty good discussion of this on its ECL page. - Dave

On 02/05/2012 10:31 PM, Mouse wrote: If I recall correctly (and I'm no expert on solid-state physics, so I could easily be wrong), the difference comes about because electron mobility in silicon is about three times the hole mobility. Wikipedia says Si at 300K has electron mobility of 1400 cm^2/V*s, vs. hole mobility of 450 cm^2/V*s.

On 06/02/2012 12:55, David Riley wrote: The end effect is reduced gain, sometimes accompanied by lower fmax. Nowadays a factor of about two in hfe, but in years gone by it wasn't unusual to see apparently-complimentary transistors with more than a factor of ten difference. -- Pete Peter Turnbull Network Manager University of York

Am 06.02.2012 10:44, schrieb Eric Smith: It is an academic issue. True, the electron mobility is different for holes and electrons, but it is not really the dominating factor. Consider Germanium has even higher electron/hole mobility values (3900 vs. 1900 cm^2/Vs) than silicon, but this doesn't make it a better semiconductor material per se. Historically, germanium point contact transistors were mainly PNP for production reasons, this changed to the reverse when mesa and planar transistors based on silicon came up. This is because SiO2 makes up a better insulator than GeO2. For paired PNP/NPN transistors (e.g. complementary transistors on the same die), one could expect a slightly higher h21fe and higher Ic for the NPN part for a given matching Ube curve, but whether this is relevant at all depends on the application. Usually, it isn't relevant, and for single transistors, you can typically find a PNP with the same or better characteristics than a given NPN. This was different, again, historically, with Ge transistors having an fT in the kHz range. And for extreme conditions, e.g. very high frequency or very high power switching, one would nowadays no longer consider bipolar transistors at all, but various types of MOSFETs. -- Holger

Sure. In other words the 10V line needs to sink current (from a higher voltage point) rather than source current (towards a lower voltage point). You have to take some care in the design of the cirucit that supplies this 10V rail (as you imply), but that's not difficult once you realise the problem, and it certianly doesn't stop you calling any point oyu likew in the circuit 'ground'. -tony