On May 7, 2014, at 3:57 PM, Eric Smith <spacewar at gmail.com> wrote:
The KW20 was not used on core-based systems, and was
introduced with the
MF20 semiconductor memory, so the drawings for the KW20 master oscillator
are in the MF20 and MG20 print sets, which are on Bitsavers.
I've been through the print sets and all I've found is the block diagrams. If you
can
point me to the specific doc then I'll look for it there.
DEC used custom DC009 transceivers for the control signals from the M8572
to the KW20 that are used to select the oscillator frequency (25, 30, or 31
MHz, or external). These are the same transceivers used for the Xbus
(semiconductor memory bus from the KL memory bus translators to the
MF20/MG20 boxes). I've never found any DC009 specifications or other docs,
so I have no idea what the signalling is like.
Right.
The six coax clock outputs are driven in sets of three by two MC10210 ECL
dual 3-input 3-output OR gates, with near-end thevenin terminations
(voltage dividers) across outputs 2 through 6, but not output 1. It should
be trivial to build a replacement if you don't mind a fixed frequency or
manually switching the frequency. The MC10210 appears to still be
reasonably easy to find.
OK.
25 MHz is used for the KL10-PA ("Model A", no section support), 30 MHz is
used for the KL10-PV and -PW ("Model B"), and 31 MHz is used for
margin-testing the -PV and -PW.
Manual switching is OK though there are commands to switch it but I think
once I have it set up I'll leave it at what ever works.
The 2065 (or any KL10 with internal MF20/MG20 MOS memory) does not have an
Sbus. It has Xbus instead. The Sbus translators (M8519) in slots 7 and 8
of the CPU backplane are replaced by Xbus translators (M8581, unless you
have a mixed core/MOS system). The Sbus cables and paddles (slots 2 and 3)
are replaced by an Xbus cable that uses an M8572 paddle (schematic and
component placement in the MF20 print set). The Xbus cabling looks similar
to VAX SBI cabling. I'm pretty sure you got at least one M8572/cable
assembly from me, when we were scrounging for missing parts.
Yes, I have that assembly. That was critical too. But I think there are other
cases where the S-Bus is used and I need the cables for that. As I recall the
other uses don't involve talking to memory (I/O?).
If you're building your own memory system instead of using an MF20/MG20, it
might be easier to use Sbus, since it uses readily available parts for the
interface, vs. the unobtanium and undocumented DC009. Sbus uses SN75453
drivers and MC10124 receivers. The Sbus cables and M9006 paddle are
nothing special, since all the electronics is on the M8519. The Xbus M8572
paddle has a small amount of electronics to drive the clock select signals
over a separate ribbon cable to the KW20, but aside from that is passive.
Yes, I'm wanting to see what the M9006 paddle looks like so I can just
"clone"
it rather than having to go through the prints and figure out the exact wiring
(which I'm likely to screw up the first time or two).
If the MF20 proves too buggy, I may do my own (shouldn't be too hard).
In either case (Sbus or Xbus), you need two translator boards
(M8519/M8580/M8581), but one cable and paddle board (M9006/M8572) supports
two chained memory boxes. You should be able to get by with a single paddle
board, unless for some reason you want to use three or four memory boxes.
TTFN - Guy