Subject: Re: FPGA VAX update, now DIY TTL computers
From: woodelf <bfranchuk at jetnet.ab.ca>
Date: Fri, 04 Nov 2005 10:19:25 -0700
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at
classiccmp.org>
Allison wrote:
There is also the matter of fault tolerence.
Parity doen't provide that
unless the OS can map out the offending bank and the offending bank
isn't in a critical location. ECC can keep you going if you have a
stuck bit but it's up to the user/maintence to fix asap.
But does any software even consider being able to be rolled back from a
check point nowdays?
With a well designed virtual memory system ( no gui stuff I guess ) a
process that takes several
days? or more to process needs to interuptable and saveable.