Hi Rick, sounds like we have been working along similar lines.
I have a Wang 520 in bits: the logic/power supply base, display, keyboard, and
(of course) the core rope ROM. Missing the case, cassette drive and printer, but
it does work when the remaining bits are connected together. Initially I was just
interested in the novelty/exercise of reading the core-rope ROM, but then figured
might as well do a simulator to check the validity of the retrieved contents.
More comments below:
Rick Bensene wrote:
Speaking of Wang Calculator ROM's, I've
recently built a fixture that
I'm successfully able to read Wang 700-series ROMs with. It's
unfortunately a non-automatic system...toggle switches and TIL-311 HEX
displays (can automate it later), and am in the (slow) process of
dumping a known good Wang 720C ROM. The ROM strobe signal timing is
very tight on the 700-series ROM...off even a little bit on the timing
(pulse width), and the readout gets real inconsistent.
Still some tinkering to do. Still, I'm very sure that the fixture to
read the ROMs is working perfectly. All ROM locations return consistent
results, and other than the emulator running into all zero ROM content
(there are quite a few "unused" locations in the ROM), all of the
instructions decoded thus far are "valid" in terms of the allowed values
of the various microcode fields.
To read the core rope I set up some TTL to produce the read-pulse-sequences
for the core rope, interfaced to and under the control of a SWTPC 6800.
The core rope contents gets dumped into the 6800 RAM and then uploaded to
my main machine over serial line.
Most of the 2048 locations read a consistent value, while 3 to 6
locations are flaky in a couple of bits. I did multiple dumps and tried all
sorts of things to get them consistent: varying the read-pulse voltage, adjusting
the read-pulse drive wires, randomising the read address sequence... nothing
would get rid of those few errors. The read-pulse timing is derived from an
integrated crystal oscillator unit and seemed to measure well in comparison
to the original but I should probably try something with some variability.
It would be interesting to see the pulsing circuit you came up with for comparison.
One cute thing, if you haven't run across it already, is that the last
locations contain test patterns:
07FC: 010101010101.. (hex 55555555..)
07FD: 101010101010.. (hex AAAAAAAA..)
07FE: 111111111111..
07FF: .. (don't remember whether it could be an interrupt vector or might be a
checksum)
Also trying to write a microcode execution engine in
Perl to run the
code, but there are lots of interesting timing considerations that
require deep digging into the schematics (which is something that I have
little patience for...basically, I'm not very good at it) in terms of
the timing of all of the register transfers in the machine. On the
surface, it looks simple, just a basic 10-phase non-overlapping clock
(shift register), but there's a lot of combinatorial logic that derives
a lot of weird timing from the basic clock phases.
So far, my attempts to execute the code I've extracted so far lead to
execution of illegal instructions (all zero ROM locations), or infinte
loops, and the code execution doesn't seem to make much sense. There
are also some microcode instructions that aren't documented, and having
to dig through schematics to figure out what they do.
On a similar note, when I execute the ROM contents in the simulation it
does manage to initially execute a subroutine loop which looks like it clears
a main register, but after returning from that it starts jumping around
the ROM address space in a bizarre sequence.
(It was almost 2 years ago that I was last working on it so I'm a little hazy on
details.)
This is one of the few occasions I wish I had a logic analyser to get a trace
from the actual unit.
Wang is also
famous for purposefully putting errors into published schematics to
throw off competitors who would use such schematics to reverse-engineer
how the machines work. So, some of my problem could be that the
schematics are not necessarily an accurate representation of the actual
logic.
Great.. and I thought I was lucky when the manuf. schematics turned up on the
web so I wouldn't have to do a full board-level RE! So it may be the latter is
still necessary.