I did a bit of searching in the fall for an 8881 (to fix a busted HALT instruction on a PDP8a). I concluded the 7439 is a pin-for-pin replacement - I can't claim all credit for this, it's probably known by a few people here. My notes say the 8881 will handle 30mA loads. The 7401 will handle 16mA, while the 7439 will handle 80mA. Cheers! b On Mon, May 2, 2016 at 10:04 AM, Mattis Lind <mattislind at gmail.com> wrote:

On Mon, Dec 5, 2016 at 4:35 PM, Toby Thain <toby at telegraphics.com.au> wrote: I use those for interfacing 5V TTL-compatible stuff to 3.3V logic. It doesn't really solve the major Qbus problems. In particular, it doesn't help with either the receiver threshold or the drive requirements.

On Mon, Dec 5, 2016 at 6:53 PM, allison <ajp166 at verizon.net> wrote: I don't fully agree. The receivers (and transceivers) had a threshold voltage that is not available with modern parts, and that actually was important for large systems with multiple bus segments. That was particularly important for large Unibus systems, but even Qbus with only two bus segments can get finicky when heavily loaded. DEC could easily have made custom interface ICs if they had needed them. AFAIK, *no* current production interface ICs have the right threshold. It's hard to meet the spec without using either NOS parts or comparators. It would certainly be possible to build a functionally equivalent bus with modern interface ICs, and it might have significantly better performance, but it wouldn't be compatible with the legacy systems.

On 12/6/16 10:05 AM, Toby Thain wrote: I'm not a noob. I'm an engineer from the the realm of DEC engineering. I also forget the 74LS14 hex inverter with hysteresis which has a threshold about 1.5V depending on whos datasheet you believe. Bottom line is the older parts has a low Vih and a high Vil with a resulting narrow noise immunity. Increasing the Vih helps this and the driver/bus combo can support it. The yabut is if the drivers have leakage then attaining Vih on the bus is problematic as the leakage was a undesired pull down. The 8xxx parts used were screened for low leakage with output is in the high state (open as they are open collector). The bus loads assert the Voltage high state and that is above 2.3V so the only limiting factor then is excessive capacitive loading which smears pulsed by RC time constant. The other issue with slow edges is where the edge really is and that adds uncertainty to timing. All of those things were allowed for in the design of the bus. The voltage your hung up about was tested to insure it was never lower than that or the noise immunity was terrible. Its companion was was that the saturated device in the package could also achieve the limit or less or a low voltage at the rated current, at that time (late 60s early 70s) this was a hard parameter to control. The bottom lime is the better the logic high voltage and logic low voltages achieved the greater noise immunity. Adding hysteresis insure that a hig is high and a low is low and not some random analog voltage inbetween (or oscillation!). As to any slew rate testing the issue was that devices that could sink the needed current were also slow as sludge and had to be tested to insure they were fast enough not that they would have a slow propagation time and switching speed as that was also a undesired in systems where fast is important. Bottom line is the datasheet and purchase spec was to insure the part worked to or better than expected rather than implying magical properties. Allison