19 Jun
2007
19 Jun
'07
2:01 p.m.
Subject: AMD2901s (was e: Inside old games machines,was: Re: Simulated CP/M-68K?)
From: "Ethan Dicks" <ethan.dicks at gmail.com>
Date: Tue, 19 Jun 2007 13:30:47 -0400
To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at
classiccmp.org>
On 6/19/07, woodelf <bfranchuk at jetnet.ab.ca> wrote:
Ignoring race conditions 9 of them are no harder than one.
The nasty is propagation delays. A machine that you can
microcode single step or slow step makes life easier.
I did an "improved 8080" a bunch of years ago using 2 and
it was fun. I have a dozen or so 2901Cs that were supposedly
the fastest of the TTL flavor. Though the ECL parts were much
faster.
Allison
Providing the word length is a multiable of 4
bits that is.
It sure would be "fun" to debug microcode issues with nine of those
puppies chained together. 
20 Jun
20 Jun
9:41 a.m.
Allison wrote:
I'm toying with the idea of a uCode testbench for a while already.
To have an FPGA(yes, I know, not everybody likes them) and a SRAM which
is at least 64 bit wide for microcode. The uCode gets downloaded via V24
or SD-Flash, then just the standard set of periperals like V24 (2), and
a bus interface, probably with some SDRAM already.
But, as usual, I can do it only in my spare time ;-)
On 6/19/07,
woodelf <bfranchuk at jetnet.ab.ca> wrote:
Ignoring race conditions 9 of them are no harder than one.
The nasty is propagation delays. A machine that you can
microcode single step or slow step makes life easier.
I did an "improved 8080" a bunch of years ago using 2 and
it was fun. I have a dozen or so 2901Cs that were supposedly
the fastest of the TTL flavor. Though the ECL parts were much
faster. Providing the word length is a multiable of 4
bits that is.
It sure would be "fun" to debug microcode issues with nine
of those
puppies chained together.
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