I think there were problems with the 68K initially. IBM did use it in their "lab" computer though. Anyone got one...<snifful> ____________________________________________________________________________________ Be a better friend, newshound, and know-it-all with Yahoo! Mobile. Try it now. http://mobile.yahoo.com/;_ylt=Ahu06i62sR8HDtDypao8Wcj9tAcJ

Jules wrote: Yes. My estimate is that cost of goods would have been higher by about $75, which would have translated to a $300-400 increase at retail. When you combine that with having nowhere near as much software available at or shortly after launch, it would have been a disaster. Remember that they weren't trying to design a system architecture to last five years, let alone 27 and counting. They were trying to ship a "me too" product with incremental improvements over the Apple II. They weren't going after the S-100 market. In the "small microcomputer" market, the Apple II was the only one that had a reasonable number of (nearly) identical expansion slots. Eric

On Friday 25 April 2008 20:04, Fred Cisin wrote: Now _that_ would have been something...! -- Member of the toughest, meanest, deadliest, most unrelenting -- and ablest -- form of life in this section of space, ?a critter that can be killed but can't be tamed. ?--Robert A. Heinlein, "The Puppet Masters" - Information is more dangerous than cannon to a society ruled by lies. --James M Dakin

On Fri, 25 Apr 2008, Michael B. Brutman wrote: It's been referenced over and over without the details. THAT'S the "about but not exactly 512K" number that we've been looking for. Once you finally found out about it, it wasn't too hard to patch.

What is the casue of this bug? -tony

What I'm asking is 'what changed between the buggy BIOS and the later, correct one?; (in respect of this memory checking routine, of course). In other words was it just a change of some constnnt (in which case the original _spec_ could have been for 544K), was it a constant that was mis-interprtedded (one infamous example of this is in the early PC BIS serial routine where a constat is taken as 80 _decimal_ (50h) and not 80h, which means the status bits returned are nonsense!), was it a change in logic, or what? -tony

I wrote: ^^^ the 8088

A little bit of history since I was there at the time (my office was across the hall from Dr. Dave Bradley...famous for inventing Ctl-Alt- Del). The IBM PC was primarily a skunk works project. As such it had to be done with as many parts that could be re-used/modified from existing designs within IBM. The original PC team (17 people if I recall) came (electrically and general board outline). To keep from using (cheaper) PC cards in the System/23 the connectors were rotated 180* so that they physically wouldn't fit in the System/23 (or visa- versa). Many of the original IBM PC boards were System/23 boards re- layed out. The System/23 is historically significant because if IBM had never built it, they *never* would have done the IBM PC. It is notable not only for the above but because it was the first IBM product that used a non-IBM microprocessor (8085). The Displaywriter was started at about the same time as the IBM PC but used a much more expensive 8086 vs 8088 that was going into the IBM PC. I remember a meeting with Marketing where they were apologizing because they had created an estimate for the total production life (at the time product life times were ~5 years) of the IBM PC (which is how the price of a product was set in IBM at the time). In order to get the price breaks that were needed, large volumes were required. Marketing came back with the largest number they had ever issued for a computer product ... 5000 ... over 5 years. Yea, right. I think we shipped that many in the first month of full production. :-) On Apr 24, 2008, at 6:25 PM, Eric Smith wrote:

Jim Leonard wrote: Makes it easier for multiple devices to share the same interrupt line. It's why there's less contention for IRQs in PCI and MCA than in ISA. Peace... Sridhar

In very simple terms, if the interrupts are level-triggered, then they can be shared by multiple deivces, if they're edge triggered, they can't be. Suppose you have 2 devives A and B sharing an interrupt line. If A assertes the line, the _change_ in state of that line is the 'efge' that indicates and interrupt has occured. B then also tries to assert the line, nothing happens (the line is already asserted), but when A releases it (when it's interrupt is acknowldeged by the processor, for example), then the fact htat B is still asserting the lien will be _missed_ by the processor, since there wasn't a change of state to cause the 'edge' that the interrupt controller cirucit is looking for. On most other machines the interrupt are, iondeed, level triggered. And the fact that you only have 4 or 8 interrupt lines is not a problem because many devices can share each one. But on the ISA bus you have to have a spearate line for each device. [What possesed Intel to include an edge-triggered mode in the 8259 interrupt controller chip is beyond me too, BTW. It was asking to be misused] -tony

On Thu, 24 Apr 2008, Roy J. Tellason wrote: It was based on the Apple ][ physical configuration. Combined with IBM being too big to ever learn from anybody else's mistakes.