16 Mar
2015
16 Mar
'15
4:27 p.m.
From: Johnny Billquist
All I can say is that I did a number of RSX SYSGENs on
that 11/34, and
it truly looked just like an 11/24 from a software point of view.
The thing that I wonder about it, for that to be true, is something that
someone (sorry, to lazy to look in the archive to give proper credit) pointed
out, which is that that CPU is only two boards, and the memory management,
including the PARs, is built into one of them. So how could one extend a PAR
from 12 bits to 16, when there's already 12 bits
buried deep inside the CPU?
That's the part that I can't work out...
I'm hoping that Update ... still have the
documentation around.
You and me both! :-)
I have this dream of one day having an 11/45, with the Enable and the optional
cache. Now that would be a sweeet machine: most of the capability of an 11/70,
but a lot less power draw. But I'd need the documentation to see how to
connect it up! :-)
Every time this comes up I really want to go searching
for manuals...
:-)
Please do! :-)
Noel
16 Mar
16 Mar
5:10 p.m.
Noel Chiappa wrote:
I have this dream of one day having an 11/45, with the
Enable and the optional
cache.Now that would be a sweeet machine: most of the capability of an 11/70,
but a lot less power draw.
The power draw of the 11/45 and 11/70 is almost the same, with the
exception of the separate memory box(es), MJ11 core or MK11 MOS, for
the 11/70. I'd *much* rather have an 11/70 with third-party memory
than an 11/45 with any amount of third-party enhancements. The PEP70
was a single-board memory that you could plug into an otherwise unused
slot in the 11/70 CPU backplane, with a few extra wire-wrapped jumpers
on the backplane, and plug in the four ribbon cables from the 11/70
cache modules. The same vendor also offered an HC70 "HyperCache"
option, which when used in conjunction with the PEP70, made all memory
operate at cache speed.
It would probably be difficult or impossible to obtain a PEP70 (with
or without HC70) at this late date. The 11/70 memory bus (between the
CPU and memory box) is quite simple, so it should be very easy for
someone with reasonable hardware expertise to design and build a
modern memory board for it, comparable to the PEP70.
5:40 p.m.
On Mar 16, 2015, at 8:10 PM, Eric Smith <spacewar
at gmail.com> wrote:
Noel Chiappa wrote:
Interesting notion. With a fairly large FPGA, you could use the on-chip memory for a
single-chip solution (well, not quite, some bus driver (level shifters) are likely to be
needed). Or a small FPGA plus one or two SRAM chips.
paul
I have this dream of one day having an 11/45,
with the Enable and the optional
cache.Now that would be a sweeet machine: most of the capability of an 11/70,
but a lot less power draw.
The power draw of the 11/45 and 11/70 is almost the same, with the
exception of the separate memory box(es), MJ11 core or MK11 MOS, for
the 11/70. I'd *much* rather have an 11/70 with third-party memory
than an 11/45 with any amount of third-party enhancements. The PEP70
was a single-board memory that you could plug into an otherwise unused
slot in the 11/70 CPU backplane, with a few extra wire-wrapped jumpers
on the backplane, and plug in the four ribbon cables from the 11/70
cache modules. The same vendor also offered an HC70 "HyperCache"
option, which when used in conjunction with the PEP70, made all memory
operate at cache speed.
It would probably be difficult or impossible to obtain a PEP70 (with
or without HC70) at this late date. The 11/70 memory bus (between the
CPU and memory box) is quite simple, so it should be very easy for
someone with reasonable hardware expertise to design and build a
modern memory board for it, comparable to the PEP70. 
8:10 p.m.
On 16 March 2015 at 20:40, Paul Koning <paulkoning at comcast.net> wrote:
Interesting notion. With a fairly large FPGA, you
could use the on-chip memory for a single-chip solution (well, not quite, some bus driver
(level shifters) are likely to be needed). Or a small FPGA plus one or two SRAM chips.
You could also make use of some of those rather quite interesting MRAM
memory chip technology that's about. All the non-volatility of core,
with all the speed, low-profile, and low power consumption of modern
volatile RAM technologies.
Unfortunately, the cost of MRAM chips is rather a lot, especially
since you can't just order small batches. Minimum order on Mouser was
128 chips at something like $20 CAD per.
- Christian
--
Christian M. Gauger-Cosgrove
STCKON08DS0
Contact information available upon request.
8:42 p.m.
On Mon, Mar 16, 2015 at 9:10 PM, Christian Gauger-Cosgrove
<captainkirk359 at gmail.com> wrote:
Unfortunately, the cost of MRAM chips is rather a lot,
especially
since you can't just order small batches. Minimum order on Mouser was
128 chips at something like $20 CAD per.
Digi-key sells them without any minimum order quantity. Their quantity
1 price for the 1Mx16 35ns TSOP-54 device (p/n MR4A16BYS35) is $36.72.
Not including parity or ECC, it takes two devices to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
9:23 p.m.
On 3/16/2015 8:42 PM, Eric Smith wrote:
On Mon, Mar 16, 2015 at 9:10 PM, Christian
Gauger-Cosgrove
<captainkirk359 at gmail.com> wrote:
Most any FPGA development / evaluation boards for the major devices from A and X
come with onboard DDR SDRAM that is typically from 16MB to 64MB, so in that case
the memory is more or less free.
If one were to build a state of the art FPGA board from scratch even then adding a
couple of dollars worth of DDR memory is no big deal (one or two devices) given the
fact that most of the mid/higher end FPGA devices have hard macro DDR controllers
in them these days.
The Terasic Cyclone IV based board comes with 32MB of SDRAM memory, an EP4CE22
Cyclone IV device with ~600Kb of internal memory and ~22K logic elements. It can be
had for about $80 these days. It is several year old tech at this point.
The BeMicroCV board comes with 128MB DDR3 memory, a 5CEFA2 Cyclone V device
with ~1700Kb of internal memory and ~25K logic elements. It can be had for only $49.
See: https://parts.arrow.com/item/detail/arrow-development-tools/bemicrocv#zgRz
For the X vs A folks there are a number of similar boards available at Digilent,
altho they
tend to be a bit higher priced and a few more bells and whistles (lights and
switches) etc.
Unfortunately, the cost of MRAM chips is rather a
lot, especially
since you can't just order small batches. Minimum order on Mouser was
128 chips at something like $20 CAD per.
Digi-key sells them without any minimum
order quantity. Their quantity
1 price for the 1Mx16 35ns TSOP-54 device (p/n MR4A16BYS35) is $36.72.
Not including parity or ECC, it takes two devices to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
17 Mar
17 Mar
12:03 p.m.
On 16 March 2015 at 23:42, Eric Smith <spacewar at gmail.com> wrote:
Not including parity or ECC, it takes two devices to
fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile"). Plus since they're modern
devices, they would be a massive upgrade to the PDP-11/70s performance
in place of its normal MOS memory or core memory. (Whether it would be
an improvement on the speed of the PEP70, I do not know.)
Cheers,
Christian
--
Christian M. Gauger-Cosgrove
STCKON08DS0
Contact information available upon request.
12:27 p.m.
On Mar 17, 2015, at 3:03 PM, Christian Gauger-Cosgrove
<captainkirk359 at gmail.com> wrote:
On 16 March 2015 at 23:42, Eric Smith <spacewar at gmail.com> wrote:
MRAM is non-volatile, sure. I?m not sure its write limit is high enough to be used as a
substitute for main memory. In any case, what PDP-11 operating systems use the
non-volatility of memory? I know of one: RSTS-11. But RSTS/E dropped that (it reboots on
powerup instead). That makes sense, given that semiconductor memory appeared fairly early
in the PDP-11 product life, and none of that came with battery backup. In other words,
only some of the models in some configurations offered non-volatile memory, which made it
fairly uninteresting for operating systems to support.
paul
Not including parity or ECC, it takes two devices
to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile"). 
12:39 p.m.
On Mar 17, 2015, at 12:27 PM, Paul Koning
<paulkoning at comcast.net> wrote:
The parts that I've been looking at have unlimited write endurance and >20 year
data retention. I'm using MRAM in my MEM11 board (seems the previous FRAM vendor was
bought out and no longer produce some of the parts I was planning on using) for emulation
of main memory, ROMs and RF11 disks. They're also plenty fast enough at 35ns access
times.
TTFN - Guy
On Mar 17, 2015, at 3:03 PM, Christian
Gauger-Cosgrove <captainkirk359 at gmail.com> wrote:
On 16 March 2015 at 23:42, Eric Smith <spacewar at gmail.com> wrote:
MRAM is non-volatile, sure. I?m not sure its write limit is high enough to be used as a
substitute for main memory. In any case, what PDP-11 operating systems use the
non-volatility of memory? I know of one: RSTS-11. But RSTS/E dropped that (it reboots on
powerup instead). That makes sense, given that semiconductor memory appeared fairly early
in the PDP-11 product life, and none of that came with battery backup. In other words,
only some of the models in some configurations offered non-volatile memory, which made it
fairly uninteresting for operating systems to support. Not including parity or ECC, it takes two devices
to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile"). 
1:04 p.m.
On Tue, Mar 17, 2015 at 12:39:21PM -0700, Guy Sotomayor wrote:
The parts that I've been looking at have unlimited
write endurance and >20
year data retention.
I'd be slightly worried that there are conditions being assumed here, even
if the MRAM data sheet doesn't seem to say so. F-RAM claimed unlimited
writes, but under slightly cherry-picked conditions that might be exceeded
after all. You could certainly write the whole memory from beginning to
end all day long, but whaling on just a small area (like the stack) could
be trouble. Obviously I hope I'm wrong -- MRAM *looks* wonderful!
I used battery-backed SRAM in the Unibus RAM card I prototyped a while back
(and just recently got working and have been finishing the XMOS firmware
for). The SRAM is cheap and fast and draws hardly any current (so it's
nothing like a lead-acid BBU setup -- AAs are fine and a CR2032 might even
last a while, so I've got one dangling off for testing to see if Rev B
should have coin cell holders), and once the battery is there, it's a nice
excuse for a TOY clock (my favorite KDJ11E feature that all PDP-11s would
benefit from).
John Wilson
D Bit
1:20 p.m.
On Mar 17, 2015, at 1:04 PM, John Wilson <wilson at
dbit.com> wrote:
On Tue, Mar 17, 2015 at 12:39:21PM -0700, Guy Sotomayor wrote:
Since I'm using the MRAM to store not only PDP-11 boot ROMs but also
the J1 code that makes the whole thing work, I'm really hesitant about using
anything that isn't truely non-volatile.
TTFN - Guy
The parts that I've been looking at have
unlimited write endurance and >20
year data retention.
I'd be slightly worried that there are conditions being assumed here, even
if the MRAM data sheet doesn't seem to say so. F-RAM claimed unlimited
writes, but under slightly cherry-picked conditions that might be exceeded
after all. You could certainly write the whole memory from beginning to
end all day long, but whaling on just a small area (like the stack) could
be trouble. Obviously I hope I'm wrong -- MRAM *looks* wonderful!
I used battery-backed SRAM in the Unibus RAM card I prototyped a while back
(and just recently got working and have been finishing the XMOS firmware
for). The SRAM is cheap and fast and draws hardly any current (so it's
nothing like a lead-acid BBU setup -- AAs are fine and a CR2032 might even
last a while, so I've got one dangling off for testing to see if Rev B
should have coin cell holders), and once the battery is there, it's a nice
excuse for a TOY clock (my favorite KDJ11E feature that all PDP-11s would
benefit from).
2:54 p.m.
On Tue, Mar 17, 2015 at 2:04 PM, John Wilson <wilson at dbit.com> wrote:
On Tue, Mar 17, 2015 at 12:39:21PM -0700, Guy
Sotomayor wrote:
The Ramtron FRAM data sheets always gave the actual endurance, which
on 3.3V parts was typically 10^14 cycles, and applied to both read and
write cycles.
MRAM works by an entirely different principle, and neither read nor
write cycles cause any significant physical or chemical stress, so the
endurance is as close to unlimited as makes no difference. The part
will wear out for other reasons before it wears out due to too many
accesses.
The parts that I've been looking at have
unlimited write endurance and >20
year data retention.
I'd be slightly worried that there are conditions being assumed here, even
if the MRAM data sheet doesn't seem to say so. F-RAM claimed unlimited
writes, but under slightly cherry-picked conditions that might be exceeded
after all. 
12:46 p.m.
On 2015-Mar-17, at 12:27 PM, Paul Koning wrote:
Well, even if the OSs didn't support restart, non-volatility of core was useful for
retention of the bootstrap program on the front-panel/pre-boot-ROM machines, just so you
didn't have to re-toggle the bootstrap at every power-up.
On Mar 17,
2015, at 3:03 PM, Christian Gauger-Cosgrove <captainkirk359 at gmail.com> wrote:
On 16 March 2015 at 23:42, Eric Smith <spacewar at gmail.com> wrote:
MRAM is non-volatile, sure. I?m not sure its write limit is high enough to be used as a
substitute for main memory. In any case, what PDP-11 operating systems use the
non-volatility of memory? I know of one: RSTS-11. But RSTS/E dropped that (it reboots on
powerup instead). That makes sense, given that semiconductor memory appeared fairly early
in the PDP-11 product life, and none of that came with battery backup. In other words,
only some of the models in some configurations offered non-volatile memory, which made it
fairly uninteresting for operating systems to support. Not including parity or ECC, it takes two devices
to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile").
12:51 p.m.
On Mar 17, 2015, at 3:46 PM, Brent Hilpert <hilpert
at cs.ubc.ca> wrote:
On 2015-Mar-17, at 12:27 PM, Paul Koning wrote:
True, though I think in practice PDP-11s came with boot ROMs. Even fairly early 11/20s
did ? the M792 discrete diode array, programmed with diagonal cutters :-).
paul
...
MRAM is non-volatile, sure. I?m not sure its write limit is high enough to be used as a
substitute for main memory. In any case, what PDP-11 operating systems use the
non-volatility of memory? I know of one: RSTS-11. But RSTS/E dropped that (it reboots on
powerup instead). That makes sense, given that semiconductor memory appeared fairly early
in the PDP-11 product life, and none of that came with battery backup. In other words,
only some of the models in some configurations offered non-volatile memory, which made it
fairly uninteresting for operating systems to support.
Well, even if the OSs didn't support restart, non-volatility of core was useful for
retention of the bootstrap program on the front-panel/pre-boot-ROM machines, just so you
didn't have to re-toggle the bootstrap at every power-up. 
1:17 p.m.
On 2015-03-17 20:27, Paul Koning wrote:
RSX supports suspending on power fail, and resume at power on...
Johnny
On Mar 17, 2015, at 3:03 PM, Christian
Gauger-Cosgrove <captainkirk359 at gmail.com> wrote:
On 16 March 2015 at 23:42, Eric Smith <spacewar at gmail.com> wrote:
MRAM is non-volatile, sure. I?m not sure its write limit is high enough to be used as a
substitute for main memory. In any case, what PDP-11 operating systems use the
non-volatility of memory? I know of one: RSTS-11. But RSTS/E dropped that (it reboots on
powerup instead). That makes sense, given that semiconductor memory appeared fairly early
in the PDP-11 product life, and none of that came with battery backup. In other words,
only some of the models in some configurations offered non-volatile memory, which made it
fairly uninteresting for operating systems to support. Not including parity or ECC, it takes two devices
to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile"). 
12:32 p.m.
On Tue, Mar 17, 2015 at 3:03 PM, Christian Gauger-Cosgrove
<captainkirk359 at gmail.com> wrote:
True, SRAM would be cheaper... a massive upgrade to
the PDP-11/70s performance
in place of its normal MOS memory or core memory
You can get some pretty fast SRAM for not much money, and 4MB isn't
"that much" in terms of part count.
I'd love to replace an MK11 and several cards with that PEP70, but I
doubt I'll ever see one.
As for MRAM, unless you have a full front panel, I don't think
non-volatility is as important as raw performance. Sure... it's nice
to be able to walk up and turn the key (I do that on a PDP-8/L with
power-fail restart) but really... how hard is it to log in, shut down
the OS then power off? I'd rather have a faster machine while I'm
using it.
-ethan
12:41 p.m.
On Mar 17, 2015, at 12:32 PM, Ethan Dicks
<ethan.dicks at gmail.com> wrote:
On Tue, Mar 17, 2015 at 3:03 PM, Christian Gauger-Cosgrove
<captainkirk359 at gmail.com> wrote:
Hmm. Maybe I should consider building a PEP-70 clone (I already
have a PEP-70/Hypercache in my 11/70). It shouldn't be too hard
to do (as has been mentioned before).
TTFN - Guy
True, SRAM would be cheaper... a massive upgrade
to the PDP-11/70s performance
in place of its normal MOS memory or core memory
You can get some pretty fast SRAM for not much money, and 4MB isn't
"that much" in terms of part count.
I'd love to replace an MK11 and several cards with that PEP70, but I
doubt I'll ever see one.
As for MRAM, unless you have a full front panel, I don't think
non-volatility is as important as raw performance. Sure... it's nice
to be able to walk up and turn the key (I do that on a PDP-8/L with
power-fail restart) but really... how hard is it to log in, shut down
the OS then power off? I'd rather have a faster machine while I'm
using it. 
12:47 p.m.
On Tue, Mar 17, 2015 at 12:41:35PM -0700, Guy Sotomayor wrote:
Hmm. Maybe I should consider building a PEP-70 clone (I already
have a PEP-70/Hypercache in my 11/70). It shouldn't be too hard
to do (as has been mentioned before).
I have found fairly little documentation on the PEP and HC. Do you have
any schematics?
/P
12:50 p.m.
On Mar 17, 2015, at 12:47 PM, Pontus Pihlgren
<pontus at Update.UU.SE> wrote:
On Tue, Mar 17, 2015 at 12:41:35PM -0700, Guy Sotomayor wrote:
The documentation that I have is basically operation and installation. AFAIK
there is no other documentation. However, the 11/70 schematics should be
sufficient to replicate them.
TTFN - Guy
Hmm. Maybe I should consider building a PEP-70 clone (I already
have a PEP-70/Hypercache in my 11/70). It shouldn't be too hard
to do (as has been mentioned before).
I have found fairly little documentation on the PEP and HC. Do you have
any schematics?
1:08 p.m.
On Tue, Mar 17, 2015 at 3:41 PM, Guy Sotomayor <ggs at shiresoft.com> wrote:
Hmm. Maybe I should consider building a PEP-70 clone
(I already
have a PEP-70/Hypercache in my 11/70). It shouldn't be too hard
to do (as has been mentioned before).
As much as I would like one (or two), what's the actual market for
such a thing? How many 11/70s are in the hands of folks like us?
-ethan
1:22 p.m.
On Tue, Mar 17, 2015 at 04:08:26PM -0400, Ethan Dicks wrote:
On Tue, Mar 17, 2015 at 3:41 PM, Guy Sotomayor <ggs
at shiresoft.com> wrote:
Quite a few I would think. We have no less then three at the club. And
of the top of my head there are at least three more owners on this list.
Given how many of the more rare machines people have, I'd venture that
there are at least 25, if not more, 11/70 machines in private hands.
/P
Hmm. Maybe I should consider building a PEP-70
clone (I already
have a PEP-70/Hypercache in my 11/70). It shouldn't be too hard
to do (as has been mentioned before).
As much as I would like one (or two), what's the actual market for
such a thing? How many 11/70s are in the hands of folks like us?
1:13 p.m.
On 2015-03-17 20:03, Christian Gauger-Cosgrove wrote:
On 16 March 2015 at 23:42, Eric Smith <spacewar at
gmail.com> wrote:
You can't improve on the speed of the PIP70/HC70 combo. At that point,
the speed is just the clock speed of the CPU. It no longer waits on
memory, as far as I know.
But getting to that point would be a nice improvement already.
Johnny
Not including parity or ECC, it takes two devices
to fill the entire
4MB address space of the PDP-11/70. Either parity or ECC will require
another one additional device, which won't be fully utilized.
Ordinary SRAM is cheaper, but $110.16 for enough RAM chips to max out
a PDP-11/70 doesn't seem all that expensive, unless you're comparing
to DDR SDRAM DIMMs for PCs.
True, SRAM would be cheaper, and you can find faster
SRAM and DRAM
than the currently available MRAM (if I recall correctly). But then
you lose the benefits of MRAM in the first place: It's non-volatile,
like core memory, and doesn't need battery backup (as you'd need if
you wanted to make SRAM "non-volatile"). Plus since they're modern
devices, they would be a massive upgrade to the PDP-11/70s performance
in place of its normal MOS memory or core memory. (Whether it would be
an improvement on the speed of the PEP70, I do not know.)
16 Mar
16 Mar
8:32 p.m.
On Mon, Mar 16, 2015 at 6:40 PM, Paul Koning <paulkoning at comcast.net> wrote:
Interesting notion. With a fairly large FPGA, you
could use the on-chip memory for a single-chip solution (well, not quite, some bus driver
(level shifters) are likely to be needed). Or a small FPGA plus one or two SRAM chips.
Assuming that you want any reasonable amount of memory (1MB or more),
a "fairly large FPGA" that provides it as on-chip memory costs several
*thousand* dollars. It makes far more sense to use external memory,
and then you only need a tiny CPLD for control, or a small FPGA if you
want to implement ECC. Assuming that you run the programmable logic
and memory at 3.3V, the "level shifters" are just 74LVC245A
bidirectional buffers.
If I were going to do that, I'd use MRAM for the memory, so that it
would be nonvolatile (equivalent to the MK11 battery backup, which
supports power-fail restart).
17 Mar
17 Mar
5:34 a.m.
On 2015-03-17 01:10, Eric Smith wrote:
Noel Chiappa wrote:
I have from time to time played with the thought...
An 11/70 with the PEP70/HC70 combo would probably draw the same as an
11/45. And you'd have a much sweeter machine.
Johnny
I have this dream of one day having an 11/45,
with the Enable and the optional
cache.Now that would be a sweeet machine: most of the capability of an 11/70,
but a lot less power draw.
The power draw of the 11/45 and 11/70 is almost the same, with the
exception of the separate memory box(es), MJ11 core or MK11 MOS, for
the 11/70. I'd *much* rather have an 11/70 with third-party memory
than an 11/45 with any amount of third-party enhancements. The PEP70
was a single-board memory that you could plug into an otherwise unused
slot in the 11/70 CPU backplane, with a few extra wire-wrapped jumpers
on the backplane, and plug in the four ribbon cables from the 11/70
cache modules. The same vendor also offered an HC70 "HyperCache"
option, which when used in conjunction with the PEP70, made all memory
operate at cache speed.
It would probably be difficult or impossible to obtain a PEP70 (with
or without HC70) at this late date. The 11/70 memory bus (between the
CPU and memory box) is quite simple, so it should be very easy for
someone with reasonable hardware expertise to design and build a
modern memory board for it, comparable to the PEP70. 
5:43 a.m.
On 2015-03-17 13:34, Johnny Billquist wrote:
I guess, everybody who has a 11/70 toyed/played with this idea.
But you need few people who would pitch in to make the boards ...
Cheers
On 2015-03-17 01:10, Eric Smith wrote:
> Noel Chiappa wrote:
It would
probably be difficult or impossible to obtain a PEP70 (with
or without HC70) at this late date. The 11/70 memory bus (between the
CPU and memory box) is quite simple, so it should be very easy for
someone with reasonable hardware expertise to design and build a
modern memory board for it, comparable to the PEP70.
I have from time to time played with the thought...
An 11/70 with the PEP70/HC70 combo would probably draw the same as an
11/45. And you'd have a much sweeter machine.
6:22 a.m.
On 2015-03-17 13:43, emanuel stiebler wrote:
On 2015-03-17 13:34, Johnny Billquist wrote:
I guess, everybody who has a 11/70 toyed/played with this idea.
Yeah... :-)
On 2015-03-17 01:10, Eric Smith wrote:
> Noel Chiappa wrote:
It would
probably be difficult or impossible to obtain a PEP70 (with
or without HC70) at this late date. The 11/70 memory bus (between the
CPU and memory box) is quite simple, so it should be very easy for
someone with reasonable hardware expertise to design and build a
modern memory board for it, comparable to the PEP70.
I have from time to time played with the thought...
An 11/70 with the PEP70/HC70 combo would probably draw the same as an
11/45. And you'd have a much sweeter machine.
But you need few people who would pitch in to make the
boards ...
Making just a replacement for the PEP70 would be easy, I think. Just
interface the 11/70 memory bus.
The more interesting one would be the HC70 style thing. Make all memory
work like cache.
That would require ripping out the existing 11/70 cache, and replace
those boards. Means you need to interface to the whole CPU. But the
gains would be much larger.
I guess it is possible. You just need to read the 11/70 drawings and
manuals, to figure out how the cache works and interfaces with the rest
of the CPU.
I would definitely be interested in helping out, but I do not have
enough time at the moment to do much of the work myself.
Johnny
9 Aug
9 Aug
8:55 a.m.
Noel, I just posted an answer to this riddle. I hope you got it. Let me
know otherwise, and I'll recap it again. :-)
Johnny
On 2015-03-17 00:27, Noel Chiappa wrote:
--
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt at softjar.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol
From: Johnny
Billquist
All I can say is that I did a number of RSX
SYSGENs on that 11/34, and
it truly looked just like an 11/24 from a software point of view.
The thing that I wonder about it, for that to be true, is something that
someone (sorry, to lazy to look in the archive to give proper credit) pointed
out, which is that that CPU is only two boards, and the memory management,
including the PARs, is built into one of them. So how could one extend a PAR
from 12 bits to 16, when there's already 12 bits buried deep inside the CPU?
That's the part that I can't work out...
I'm hoping that Update ... still have the
documentation around.
You and me both! :-)
I have this dream of one day having an 11/45, with the Enable and the optional
cache. Now that would be a sweeet machine: most of the capability of an 11/70,
but a lot less power draw. But I'd need the documentation to see how to
connect it up! :-)
Every time this comes up I really want to go
searching for manuals...
:-)
Please do! :-)
Noel
3423
days inactive
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days old
26 comments
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participants (12)
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ak6dn＠mindspring.com -
bqt＠update.uu.se -
captainkirk359＠gmail.com -
emu＠e-bbes.com -
ethan.dicks＠gmail.com -
ggs＠shiresoft.com -
hilpert＠cs.ubc.ca -
jnc＠mercury.lcs.mit.edu -
paulkoning＠comcast.net -
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wilson＠dbit.com