On 05/13/2012 04:32 PM, Holm Tiffe wrote: Are datasheets around for the K1801 chips? -Dave -- Dave McGuire, AK4HZ New Kensington, PA

hello Dave(it reminds me a film!!), well ...those processors were used in several computers :the uknc,bk,and dvk serie,full schematics exists on sites devoted to them,data sheets also. for a start see here: http://www.radio-astronomie.com/ordinosaurus.htm best regards Alain Nierveze www.radio-astronomie.com nierveze at radio-astronomie.com ----- Original Message ----- From: "Dave McGuire" <mcguire at neurotica.com> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org> Sent: Sunday, May 13, 2012 10:57 PM Subject: Re: FW: homebrew PDP-11 using ancient USSR chip

emu at e-bbes.com wrote: ...since they are cheap and avilable? Ebay:400182910730 Even this one is interesting: Ebay:160503454226 Regards, Holm -- Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe, Freiberger Stra?e 42, 09600 Obersch?na, USt-Id: DE253710583 www.tsht.de, info at tsht.de, Fax +49 3731 74200, Mobil: 0172 8790 741

I assume T11 also provide Q-BUS as chip interface, so probably two different "CPU+bootstrap ROM" cards could be designed and used with same motherboard that would provide all peripherals. thanks, Andrey

On 14/05/12 7:29 AM, Allison wrote: I wouldn't advocate more entropy if the controller is working. I haven't found loose T11s easier to find than J11s, though I've been keeping an eye out. For the record, I am interested in J11 SBC projects. --Toby

I found couple on-line shops located in Moscow here: http://www.elekont.ru/search/?q=1801%E2%EC and here: http://www.chipdip.ru/search.aspx?tmpl=results&searchtext=1801%D0%B2%D0… I don't know if they ship them abroad. thanks, Andrey

I think fair price for the 1801VM3 ~$15... the exchange rate 40 RUB for 1 EUR.

Ok, this is an stupid question, but who knows? People says that is no offense in asking :o) Is there someone with a spare sinclair spectrum which wants to give away to a nice and helpful Brazilian friend :) I pay shipping :) Of course, I'd cry for a gray +2 or a +3 :) Just asking, my birthday is on may 24th, who knows? :o) Thanks Alexandre Souza, PU1BZZ (yes, I'm cheap.) --- Enviado do meu Motorola PT550 Meu site: http://www.tabalabs.com.br

At 03:01 PM 5/17/2012, Roger Pugh wrote: As is mine! I can't think of anything I really want to beg for, though. - John

On 17/05/2012 17:26, Alexander Schreiber wrote: http://www.xe.com/ucc/ is pretty useful for conversions. -- Pete Peter Turnbull Network Manager University of York

hello here(among many others places) http://www.emuverse.ru/downloads/computers/ lots of docs on bk,dvk,uknc series,all pdp11,all use those processors,lots of schematics that can help in understanding how they work,of course all in russian, best regards Alain Nierveze www.radio-astronomie.com nierveze at radio-astronomie.com ----- Original Message ----- From: "Dave McGuire" <mcguire at neurotica.com> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org> Sent: Sunday, May 13, 2012 10:57 PM Subject: Re: FW: homebrew PDP-11 using ancient USSR chip

On 14 May 2012 at 17:05, Andriy Romanenko wrote: Since we're talking VHDL here, how does the performance of the old USSR chips differ from the performance of a modern FPGA implementation, say, the W11A version of the PDP 11/70 on opencores? Just curious, Chuck

On Monday, May 14, 2012 06:55:45 PM David Riley wrote: PDP2011 runs at 10Mhz cpu speed on most boards - it can be tweaked to run faster, but I haven't really tried to make it as fast as possible. Anyway, those Mhz don't compare easily to 'real' PDP Mhz - the amount of cycles per instruction are not the same. 'Real' PDP's tend to use microcode, and very clever memory interfacing including cache in some models. I'm using a state machine, and a simplistic memory interface. That difference causes very different instruction timing behavior - it depends a lot on which instructions you would use, and how much memory access would be involved. With a lot of exceptions, an instruction needs a minimum of 2 cycles, one extra if the destination is a register, two extra if the destination is a memory location, and one for each memory reference needed for src or dst modes. So, a clr r0 would need 3 cycles; a clr mode 7 would need 7 cycles. EIS instructions need some more overhead cycles, but mul comes for free (it uses the FPGA multipliers). The other EIS, particularly div however take a lot of cycles. As do all the FP11 instructions - all of those are multiple precision; setting single precision limits what is returned, not what is calculated. Anyway, I've run a lot of maindecs. For some of those, the source is available quickly the test should run. In all cases I found, pdp2011 is faster than the original model, but in the same league - I mean, maybe 3 to 10 times faster, but not a hundred times. Another take on the subject is the way Walter compared w11's speed to real hardware using the benchmarks of the early '90. I ran one of the benchmarks some time ago; where w11 reaches 160-252 Hanoi?s per second, pdp2011 reaches about 38 with the CPU running at 10 Mhz. In comparison, a 11/53+ does 12.

Basically, those chips are analogous to Ferranti's ULA, they are made of 100 000 logical gates powered by 5 volt VCC. So, if overclocked to 8...10 Mhz sytem should yeild ~2500000 reg->reg operations per second. Modern fpga cores probably may run on speed up to 20Mhz using Cyclone-IV, so expected performance up to 7 000 000 reg->reg op/sec.