3 Feb
2017
3 Feb
'17
4:10 p.m.
I'm not sure you want to hide glitches. There are times
when you might want to see them.
It is more about knowing when a glitch has meaning and when it doesn't.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 3:46:32 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 23:29, "dwight" <dkelvey at hotmail.com> wrote:
Adrian
What you see on the other select line is what is called a glitch.
These are not that uncommon during the early part of the address.
What is important is that there are no glitchs when ALE transitions.
Ah, ok, there's a glitch filter that I can apply to each channel, I'll
explore that.
Cheers!
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham
<witchy at binarydinosaurs.co.uk>
Sent: Friday, February 3, 2017 2:34:18 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Logic Analysers
On 03/02/2017 19:43, "Tony Duell" <ard.p850ug1 at gmail.com> wrote:
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
But that's why I said 'about'. I am
doing order-of-magnitude calculations,
not trying to design a delay line. I would estimate that between adjacent
ICs on the same board you'd get a delay measured in 10's or 100's of
picoseconds. That sort of order. So a 25MHz logic analyser, with an
effective time resolution of 40ns (if that) is not going to show it.
There is no way you're going to get delays of 40ns between adjacent
ICs on any reasonable PCB.
This is the sort of thing I mean:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking.jpg
Watching the A1 address line (no triggers just sampling 6 points) and a
pulse appears at ROM4 on the falling edge of the ALE signal but not the
other 3 ROMs or the LS373 flip-flop that's demultiplexing the AD1 pin of the
8085. While I was thinking about the possibility of propagation delay I
noticed this one:
http://www.binarydinosaurs.co.uk/STCExecutelA1checking2.jpg
Pulse missing from ROM3.
Given the paths on this board aren't massive and resistance is equal between
all points when measured with a DMM (and all sockets have been replaced,
traces checked etc) what else could I be looking at?
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?
