15 Nov
2011
15 Nov
'11
11:45 a.m.
Atmel had two families of FPGAs, the AT40K and the
AT6000. They are both
tiny and limited by today's standards, but teh AT6000 (if I remember
correctly) did have its configuration bits fully documented and for a
while I considered using it in my projects for this reason.
I assume said chips are very hard to find now. That's the other problem I
find withFPGAs and their ilk -- they're discontinued and replaced very
freqeuntly. And then you have to updata your tools for the new device and
hope it really does behave identically. At least with plain old TTL I can
still get a 14 pin chip that behaves in much the same way as the
original 7400, albeit faster and with less power consumption
There was a project to figure out the configuration
bits for Virtex
chips which was part of a larger project to build a PDP-10 with FPGAs. I
don't think either was finished:
http://neil.franklin.ch/Projects/VirtexTools/
Here is a series of papers about more recent efforts to generate
configuration bits without using the vendor tools:
Roman Lysecky, Frank Vahid, and Sheldon X.-D. Tan. 2004. Dynamic FPGA
routing for just-in-time FPGA compilation. In Proceedings of the 41st
annual Design Automation Conference (DAC '04). ACM, New York, NY, USA,
954-959.
http://dl.acm.org/citation.cfm?id=996819&preflayout=flat
Etienne Bergeron, Marc Feeley, and Jean Pierre David. Toward on-chip JIT
synthesis on Xilinx VirtexII-Pro FPGAs. In International IEEE Northeast
Workshop on Circuits and Systems (NEWCAS'07), pages 642-645, August 2007
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDavidNEWCAS07.p
df
Etienne Bergeron, Marc Feeley, and Jean-Pierre David. Hardware JIT
Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs. In
International Conference on Compiler Construction (CC'08), volume 4959
of Lecture Notes in Computer Science, pages 178-192, March 2008
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDavidCC08.pdf
Etienne Bergeron, Louis-David Perron, Marc Feeley, and Jean Pierre
David. Logarithmic-Time FPGA bitstream analysis: A step towards JIT
hardware compilation. ACM Transactions on Reconfigurable Technology and
Systems, Vol 4, No 2, Article 12 (May 2011), 27 pages
http://dl.acm.org/citation.cfm?id=1968502.1968503&preflayout=flat
Am I theonly person to feel it's ridiculous to have reserach papers
re-discovering information that is already known ot some people (those
who work for the FPGA manufactuer). I feel that research should solve
genuine problems that nobody knows the answer too, not artificial ones to
whci hthe anser is known but 'we won't tell you'.
-tony