4 Oct
2012
4 Oct
'12
3:20 p.m.
Date: Wed, 03 Oct 2012 18:57:09 -0700
From: Rob Doyle <radioengr at gmail.com>
....
I've starting to create a DEC KS10 (PDP-10) in an
FPGA.
....
My goal is to implement the hardware close enough to
run the
microcode unchanged. When that is working well enough, we
can add TTY IO and a disk controller. Because the KS10 only
implemented half of it's microcode address space, we have
plenty of unused address space to add microcode support for
the on-board peripherals.
KLH10's KS simulation includes emulation of the ACC LH/DH IMP
interface, so Internet connectivity could be an option!
If anybody is interested in collaborating, learning
Verilog
and/or FPGA design, goofing around, or participating in any
way, please let me know off-list.
I wish I had the time/focus to spare!
phil