20 Feb
2022
20 Feb
'22
4:42 p.m.
On 2/20/22 14:31, Chuck Guzis via cctalk wrote:
On 2/20/22 10:10, Mark Kahrs via cctalk wrote:
> I heard Butler Lampson once exclaim that ECL design was in some ways easier
> than TTL. If you terminated every line, you get controlled impedances with
> controlled edges. This was the design philosophy for the Dorado.
Yes, quite
true.? Really short lines could be left
unterminated, but you still needed a pull-down resistor.
Indeed--ECL WW prototype boards usually had a 3rd row
for SIP
termination resistors alongside the DIP sockets. One nice thing about
ECL is that there are many fewer problems with power rail spikes. On
the other hand, the constant power consumption needs beefier power supplies.
I recall that Honeywell redid one of their mainframe designs in ECL,
with somewhat disappointing performance results. I don't recall the
details offhand.
Yup, I was trying to speed up a baud rate divider that was
already using AS or FAST 4-bit counters.? I worked out how
much faster I could do it with ECL, and the result was not
worth it. But, back in the days when TTL was king, before
LS, AS and FAST, ECL had a REAL advantage.
Jon