20 Feb
2022
20 Feb
'22
10:10 a.m.
I heard Butler Lampson once exclaim that ECL design was in some ways easier
than TTL. If you terminated every line, you get controlled impedances with
controlled edges. This was the design philosophy for the Dorado.
20 Feb
20 Feb
12:31 p.m.
On 2/20/22 10:10, Mark Kahrs via cctalk wrote:
I heard Butler Lampson once exclaim that ECL design
was in some ways easier
than TTL. If you terminated every line, you get controlled impedances with
controlled edges. This was the design philosophy for the Dorado.
Indeed--ECL WW prototype boards usually had a 3rd row for SIP
termination resistors alongside the DIP sockets. One nice thing about
ECL is that there are many fewer problems with power rail spikes. On
the other hand, the constant power consumption needs beefier power supplies.
I recall that Honeywell redid one of their mainframe designs in ECL,
with somewhat disappointing performance results. I don't recall the
details offhand.
--Chuck
1:20 p.m.
On 2/20/22 15:31, Chuck Guzis via cctalk wrote:
On 2/20/22 10:10, Mark Kahrs via cctalk wrote:
It's long enough ago that my mind is fuzzy, but I think Primes were
ECL.
bill
I heard Butler Lampson once exclaim that ECL
design was in some ways easier
than TTL. If you terminated every line, you get controlled impedances with
controlled edges. This was the design philosophy for the Dorado.
Indeed--ECL WW prototype boards usually had a 3rd row for SIP
termination resistors alongside the DIP sockets. One nice thing about
ECL is that there are many fewer problems with power rail spikes. On
the other hand, the constant power consumption needs beefier power supplies.
I recall that Honeywell redid one of their mainframe designs in ECL,
with somewhat disappointing performance results. I don't recall the
details offhand. 
21 Feb
21 Feb
1:39 a.m.
On Sun, 20 Feb 2022 at 21:20, Bill Gunshannon via cctalk
<cctalk at classiccmp.org> wrote:
On 2/20/22 15:31, Chuck Guzis via cctalk wrote:
Gould made a set of realtime and (via a board swap) unix systems - we
had a few PowerNode 6040s and one 9080 at university. One of the
6040's was mostly consumed by providing NFS to the other machines. I
remember at the time being impressed that the ffs had on disk padding
for 64 bit timestamps.
When the university stopped using them the CS department just left
their 6040 running unmonitored over the summer, and came in to find
the aircon had partially flooded the room then failed, and the machine
was happily still running in a shallow pool of slightly steamy water
(it was, shall we say, not in a purpose built room)
I also heard a possibly apocryphal story that the royal navy was
tendering for an onboard computer for a sub: various suppliers found
that their sample machines kept crashing, and the gould was the only
one able to run reliably - turned out the installation location was
quite close to "power generation equipment" and had been selected as
the ambient temperature was too high to put anything else there
David
On 2/20/22 10:10, Mark Kahrs via cctalk wrote:
It's long enough ago that my mind is fuzzy, but I think Primes were
ECL.
I heard Butler Lampson once exclaim that ECL
design was in some ways easier
than TTL. If you terminated every line, you get controlled impedances with
controlled edges. This was the design philosophy for the Dorado.
Indeed--ECL WW prototype boards usually had a 3rd row for SIP
termination resistors alongside the DIP sockets. One nice thing about
ECL is that there are many fewer problems with power rail spikes. On
the other hand, the constant power consumption needs beefier power supplies.
I recall that Honeywell redid one of their mainframe designs in ECL,
with somewhat disappointing performance results. I don't recall the
details offhand. 
20 Feb
20 Feb
4:42 p.m.
On 2/20/22 14:31, Chuck Guzis via cctalk wrote:
On 2/20/22 10:10, Mark Kahrs via cctalk wrote:
> I heard Butler Lampson once exclaim that ECL design was in some ways easier
> than TTL. If you terminated every line, you get controlled impedances with
> controlled edges. This was the design philosophy for the Dorado.
Yes, quite
true.? Really short lines could be left
unterminated, but you still needed a pull-down resistor.
Indeed--ECL WW prototype boards usually had a 3rd row
for SIP
termination resistors alongside the DIP sockets. One nice thing about
ECL is that there are many fewer problems with power rail spikes. On
the other hand, the constant power consumption needs beefier power supplies.
I recall that Honeywell redid one of their mainframe designs in ECL,
with somewhat disappointing performance results. I don't recall the
details offhand.
Yup, I was trying to speed up a baud rate divider that was
already using AS or FAST 4-bit counters.? I worked out how
much faster I could do it with ECL, and the result was not
worth it. But, back in the days when TTL was king, before
LS, AS and FAST, ECL had a REAL advantage.
Jon
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