5 Mar
2002
5 Mar
'02
8:17 a.m.
--- Tom Leffingwell <tom(a)sba.miami.edu> wrote:
On Sat, 2 Mar 2002, Jerome Fine wrote:
> I can't understand how funding can be so tight that a project which
> uses a $ 100 million satellite can't find the support for a PDP-11
> system at this point.
I used to work for these guys (well... their predecessors, but the same
program and source of funding). I understand how it's possible. The
entire U.S. Antarctic Program, research grants, equipment, fuel, food,
building supplies, salaries, boat and aircraft rental, offices,
*everything*
is around $200M USD per year. For a program that employs hundreds of
people in several countries over several continents, they do a decent
job of doing things on the cheap. There are times, though, that individual
decisions and/or priorities seem completely whacked.
I did manage to pickup an empty Microvax chassis. Its
9-slot, and I'm
not sure exactly what it is. VS31V-A2 is the model number on the back
of the case, but that sounds like a system model number.
Some kind of VAXstation 3100, I'd wager. Too new for my expertise. ;-)
Do I have to use the M8189 with this chassis or can I
use my M8186?
No. Either CPU will do. I'm sure you can find docs, but if your box
is like a BA-23, the top three slots are probably "CD" slots so that
the right half doesn't need Qbus granting. It's been done here before
in ASCII art, but the grant chain for a BA-23 looks like this...
AB CD
+--------------------+
1 I | I
I | ||||||| I <- "CD interconnect"
2 I | I
I | ||||||| I <- "CD interconnect"
3 I | I
I | I
4 I +----------+ I
I | I
5 I +----------+ I
I | I
6 I +----------+ I
I | I
7 I +----------+ I
I | I
8 I +----------+ I
I | I
9 I +----------+ I
+--------------------+
What I'm trying to communicate is the dual nature of the backplane - the
first three slots have the "CD interconnect" on the "CD" slots - the
uVAX-I
CPU and the RLV11 disk controller depend on them. I don't know what else
does. In a MicroVAX (past the -I), the memory does *not* sit on the Qbus.
It sits on the PMI (Private Memory Interconnect). I believe this is the
case for later PDP-11s (11/83, etc.) as well. The memory cards go in a
quad slot below the CPU and only the left half of them sit on the Qbus.
If you have any dual-height Qbus memory for your KDF-11, it goes only
on the left side; the right side stays empty, but only at the top of
the box, not further down.
Peripherals can go anywhere there's a Qbus slot. I don't recall if
there's an official rule that memory *must* go between the CPU and the
first peripheral, but it is at least the convention. If you aquire a later
CPU, like from an 11/53 with RAM and serial onboard, you could conceivably
have that board in slot 1, a SCSI card or other disk controller in the left
side of slot 2 and that's it. If you were willing to go with a TU-58 as
the only mass storage device, all you really need, then, is a way to power
the board, and perhaps terminate the bus, but that's another project.
Again, check the docs for your particular enclosure. My "in head"
knowledge
of PDP-11s and Qbus VAXen kinda trickles down for stuff newer than about
1989. We stopped buying new hardware about that point and I spent the next
five years fixing the old stuff.
-ethan
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