6 Jun
2010
6 Jun
'10
4:32 p.m.
I hope that you don't think I in any way feel that your hardware
approach is less important
than a software approach. Just different. And just as important for
learning what you are
interested in!
I am not sure, but perhaps that is one advantage of an emulator. Since
there
is absolutely no hardware involved (well 99% of the time), many of those
questions
do not even arise, let alone need to be solved.
I must accept you answer, but I am left confused. Is FPGA hardware so
much slower than
the CPU for a current Intel or AMD based PC? Even with all the
emulation in SIMH and
the C program, SIMH runs RT-11 many times faster on my PC. And under
Ersatz-11,
RT-11 runs about 100 times faster than on a PDP-11/93.
My reasons for making enhancements to RT-11 like a Logical Name (LN.SYS)
device drives or fixing bugs like Y3K code are also for fun. Currently,
I am
attempting to determine the changes required under RSTS/E to .Chain to
another program with an arbitrary device and PPN, then back to the original
program - also with an arbitrary device and PPN. Since RT-11 does not
support PPNs, there is no normal method to include the PPN in the .Chain
EMT request. In addition, since there are two major areas under RT-11
where using the .Chain request either does not work at all or is totally
inadequate. So I decided it would be fun to see if the RSTS/E side of the
fence could be fixed at the same time as the RT-11 code is enhanced.
Interestingly, some RT-11 programs actually support running under RSTS/E
and probably recognize that there is a PPN when RSTS/E is running. But
that was not done with all programs and some programs were probably
written before it was recognized that having a single program to support
with extra code for both operating systems was less work than two separate
programs.
Philipp Hachtmann wrote:
(a) Without
being very accurate, and based on your experience with
the PDP-8, how
long do you think that it would take you to implement a PDP-11? Just
a rough estimate
in months or years!
A pure CPU? A few days. Not more. But... I haven't written a pdp11,
only an 8 in VHDL. It took me a few days (3,4?) to get a pdp8 CPU
passing the basic tests. But that was less than the beginning of the
hassles: What about front panel? Peripherals? Which options to
support? All that tends to be more complicated to decide and build
(frontpanel..!) than implementing the raw processor. There's a big gap
between a running CPU and a system running an operating system. (b) About how
fast might the FPGA solution be compared to something
like a PDP-11/93?
Again, just a rough estimate like 10 or 20 times as fast.
Puh. Here's a pessimistic estimation: One cycle for every instruction
plus one cycle for every memory access. Makes something like 6-7
cycles for a memory-memory indirect addressing instruction with
increment or decrement or something alike. On a Spartan-3 you can run
it with approx. 100MHz if carefully designed. There are faster FPGAs
as well...
Anyone here who can calculate actual numbers? For a pdp8/e I've
practically proven approx 120 times faster than the original - and
still slower than SIMH on my PC... Any idea why
you did an FPGA implementation of the PDP-8?
I did it for fun. I always wanted to design a processor - so it became
something pdp8 like. I assume that Brad did not have much other reasons. Best wishes and a nice day,
Thank You. You also It is sort of fun playing with the old software
when there is no deadline to finish the code.
Jerome Fine