27 Aug
2012
27 Aug
'12
2:31 p.m.
Tony Duell wrote:
RIght, I stand corrected. I was clearly mis-informed by said Amstrad
designer.
Using the 8041 as a boot ROM would be problematic
IMHO. There could be
code i nthere to preset the boot ROM bytes one at a time on a noraml read
cycle I suppose -- i nfact that could eb why the PROG pin is conencted to
a signal o nteh SIC alled NBOOT. Readign the ROM directly involves
overvoltaging one of the 8041 pins, I can't eee the circuitry to do that.
Jacob Nevins describes the boot process as the Z80 sees it, here:
<http://www.chiark.greenend.org.uk/~jacobn/cpm/pcwboot.html>
Here's the code the 8041 executes at startup:
mov r2, #6 ;6 byte prefix
mov r0, #prefix
call data2z80
mov r1, #0
write_data:
mov a, #0edh
call byte2z80
mov a, #0a0h ;LDI
call byte2z80
mov a, r1
movp3 a, @a ;Followed by the byte to write
inc r1
call byte2z80
djnz r2, write_data
mov r2, #5 ;5 byte suffix
call data2z80
jmp mainloop ;Start doing printer control things.
;
data2z80:
mov a, r0
movp a, @a ;Next byte to send to the Z80
inc r0
call byte2z80 ;Transmit it
djnz r2, data2z80
ret
;
byte2z80:
jobf byte2z80 ;Wait for Z80 to read the buffer
out dbb, a ;Set the byte to write
mov a, #0ffh
anld p7, a
ret
;
; 6-byte prefix:
;
prefix:
db 0AFh ; XOR A
db 0D3h, 0F0h ; OUT (0F0H), A ;Page in RAM at 0000
db 11h, 02h, 00h ; LD DE, 2 ;Start writing data at 2
;
; 5-byte suffix:
;
db 0C3h, 0, 0 ; JP 0 ;Jump to the boot image in RAM
db 0D3h, 0F8h ; OUT (0F8h), A ;And stop reading bytes from
;the 8041
waht casues the Z80 to even look at the 8041 ports? I notice that the
gate array chip has complete control over the 8041, and also the Z80 wait
line, does it contain a state machine to hold the Z80 in a wait state
until the next byte is ready from the 8041, then set the 8041 lines ot do
a read from its data register wbich will casue said byte to appear on the
system data bus?
Seems like a lot of work to me...
-tony