On 4 Jan 2009 at 11:32, Jules Richardson wrote:
It does seem logical (to both of us, anyway) that
it's just a set of
flip-flops set by the prefix bytes to indicate different states - but so far
it seems that this isn't actually documented anywhere (presumably because it
doesn't *need* to be as far as anyone using the CPU is concerned)
From an operational standpoint concerning DD and FD, it
makes sense.
All of those "undocumented" instructions involving half of
IX or IY
are just normal DE and HL-involved instructions with a prefix byte.
But the CB and ED opcodes are radically different from their single-
byte cousins and I suspect that a different mechanism is at play
here. Perhaps they switch to a different section of the decoding
PLA.
Cheers,
Chuck