28 Apr
2013
28 Apr
'13
12:41 p.m.
On 4/28/2013 11:44 AM, David Riley wrote:
Yes, but what makes it incompatible with an IDE cable
pinout is
that pins 12 and 30 are ground, 11 is 5v and 29 is 3.3v. On an
IDE cable, 11 is DD3, 12 is DD12, 29 is #DMACK and at least 30
is ground. You need to swizzle the pins around through an
adaptor board if you're going to use it for IDE.
I guessed when I bought the board One header would be IDE and
the other a custom I/O.
In what sense? The only significant thing (from my
POV, for
what that's worth) that the DE0 lacks vs. the DE1 is the
SRAM. It has normal SDRAM (not DDR), which takes a bit of
work to interface, but it's worth the investment in time.
The nice thing about (non-DDR) SDRAM is that it is interfaced
almost identically to regular DRAM, but all the commands and
data come synchronously on a clock edge instead of on the RAS
and CAS edges. The only thing that's pesky (as Sytse pointed
out) is making sure that you have your setup and hold timing
working properly; you'd have to do that anyway with normal
DRAM. DDR gets more hairy, but that's not on the DE0.
The SRAM will let me do crash and burn testing.
Off hand the 18 bit cpu I am designing looks to have about
150 LE's for the alu and 150 for the registers. I am guessing
about 300 more for the random control logic.
Indeed! And for other fun little projects.
What other fun projects?
- Dave