30 Mar
2017
30 Mar
'17
8:07 p.m.
It's not clear C-coupling is what's going on
here (the wave shape looks pretty sharp for what I understand of the circuit/layout).
Notably though, C-coupling would remove any DC bias, but David's screen shot
indicates a DC bias on the line.
Is this line currently connected to the FPGA, or is it just the wire and R?
Perhaps the bias is coming from the FPGA, with C-coupling of the wave via the wire.
Or perhaps it's all crosstalk from within the FPGA, 'visible' because of the
high load R.
Yes, the wire is connected to the FPGA at one end. That FPGA I/O pin is
*supposed* to be configured for high-Z but that's the only place I can
see the DC bias coming from.
If the wire and FPGA pin are connected, separate them
(reduce the wire circuit to just the wire and R to GND): see whether the DC bias and/or
the square wave disappear.
Because of the way it's built, I'm not seeing a reasonable way to
disconnected the FPGA while leaving the rest intact. However, I did
move the signal to another wire in the ribbon cable and the problem is
basically gone. This lets me move on with other issues but am still a
bit puzzled with this one.