yet another pdp-8 in a fpga, but this time running tss/8

Jerome H. Fine wrote: It terms of pure clock cycles per second, definitely. Most FPGA eval boards (and his in particular) run around 50mhz(ie come with onboard 50mhz oscillator). This is for clocking the synchronous design. So the flip flops are driven by this clock. Most of these boards will accept upwards of 100mhz. There are some internal-to-the-FPGA processes that can run ~400mhz. My limited understanding is that most commercial applications are less than 250mhz because high speed designs are tough to troubleshoot. Crosstalk, connectors, etc can all become big problems. With all this being said, since you have the ability to create custom hardware that can perform exactly one function really really well, FPGAs can often destroy multi-ghz PCs in terms of performance for limited applications. You can create various hardware decoders(video, audio), or encryption/decryption hardware. Provided you can scale this stuff (parallelize), you can just keep throwing FPGAs at a problem. Small FPGAs that are cheap are still fairly powerful. Hope this helps the discussion. Keith