On Feb 26, 2022, at 2:19 AM, Noel Chiappa via cctalk
<cctalk at classiccmp.org> wrote:
So, either (console halt, or a HALT instruction) will cause the identical
response in the processor; see Section 4.10.3 "Halt Grant Requests": the CPU
sends HLT GRANT to the console, which returns SACK. As long as SACK is
asserted, the processor waits with its clock inhibited:
Ah, interesting! I had no idea the console(s) used SACK to interact with the CPU in this
way. That?s a useful tidbit to tuck away for future reference.
If there's a broken grant chain, then as you
originally pointed out, the M9302
will jam SACK on. The M8264 could not even be there, and nothing would be any
different. Same thing if the CPU asserts a grant in response to a now-removed
interrupt request: the M9302 will jam SACK on, etc, etc.
Perhaps the intent was to always use a non-turnaround far side terminator in
configurations with an M8264?