On 11/9/15 7:31 PM, Eric Smith wrote:
Do you have any idea why it was thought a good idea to
use
edge-triggered interrupts?
I wasn?t really involved in the HW side of things but I
think it was because it was
?easier?. I think at least one device just generated a pulse for an interrupt rather
than having some sort of latch.
I can easily believe that to be true of the
System/23. To the best of
my knowledge, no add-on boards IBM marketed for the PC worked that
way. For the PC, edge-triggered interrupts were a pain in the ass,
especially if you wanted to have multiple devices (e.g., COM ports)
sharing an interrupt. Oh well.
Oh, trust me I know about the edge triggered interrupt problem. I was
trying to support
a "simple" multi-com board for Xenix/286 on the PC-AT and just couldn't
make it work
properly with edge triggered interrupts.
One of the things that the MCA in the PS/2's did was to do away with
edge triggered
interrupts...they were all level. A number of us demanded that of the
new bus. Of course
we didn't get the most important thing right (configurability) but we
were constrained by
being able to take existing designs and just "tweak" them in order to
make them MCA
boards.
It took a long time, but the PC legacy interrupts are finally all but
eliminated from modern PCs, replaced by the much saner APIC. While the
PCI bus still used discrete interrupt lines, PCIe now uses bus
transactions, which further eliminates legacy restrictions. Of course,
for compatibility, the north bridge (sometimes integrated into the CPU
chip) still has to provide 8259A interrupt controller functionality
and by default map at least some of the modern PCIe interrupt hardware
to it, to support legacy software, but most recent PC OSes use the
APIC natively even on uniprocessor systems.
The 8259 (along with the damned 8254) are still alive and well in
current Intel PCHs. The
current (Skylake) generation of CPUs and PCHs still have them. :-(
Actually as of Windows 8.x the 8254 is *still* used. :-(
TTFN - Guy