17 Nov
2011
17 Nov
'11
1:29 p.m.
On 11/17/2011 11:47 AM, Al Kossow wrote:
On 11/16/11 6:55 PM, Eric Smith wrote:
Read Crossing the Abyss: asynchronous signals in a synchronous world.
http://www.edn.com/file/17561-310388.pdf?force=true
It talks about dual flip-flops vs handshaking vs fifos.
Keith
Note that everything in the FPGA doesn't have
to operate on the same
clock. You can have multiple clock domains.
Is there anything higher-level/better for describing an cross-domain
signal beyond specifying that it go through a
dual-rank synchronizer?