31 Mar
2017
31 Mar
'17
5:10 a.m.
Don't trust ANYTHING! Recent Xilinx FPGAs have
permanent "weak
keepers" on all pins, they can not be turned off.
What this is is a non-inverting receiver on the pad, that is driving
back to the pad with about a 50K Ohm resistor.
Plays hob with analog stuff like crystal oscillators. The weak keeper
would PERFECTLY explain your square wave!
When it gets a narrow pulse to high, it holds the line high. When it
gets a narrow pulse to low, it will switch to holding the line low.
So, if you are using a Xilinx FPGA of recent vintage, or some of their
CPLDs, they will do exactly this.
Looks like we have an explanation then. We're using an XC7A75T-CSG324,
a Xilinx Artix 7 series FPGA. Thank you very much.