segmented memory models

Patrick Finnegan <pat at computer-refuge.org> wrote: Actually, some PDP-11 models do support restartable instructions. Just not all of them. It requires the MMR3 register, which tells what modifications have been done to different registers before the instruction was aborted, so that you can back out of that, and then restart the instruction. Some PDP-11 models' MMU would also allow you to implement a virtual memory system, if you wanted to. It's just that noone did, and perhaps for good reasons. With only 8 pages, and way more physical memory than virtual, there isn't really much point in implementing a virtual memory system. But on an 11/70, it is definitely doable. Another example of the hardware designers implementing something that they didn't know was needed, but which could be done without much extra effort, so they did it, just in case someone would want to play around with it. But I think we've already established that the PDP-11 isn't brain damaged. :-) (Oh, and I agree with Tony Duells sentiment about the Intel brain damage. It's plain and simple just a question of not doing something one way when it was common knowledge at the time that that was the way to do it. NIH or just sheer lack of clues don't matter. It's brain dead all the same.) Johnny