3 Jan
2006
3 Jan
'06
1 p.m.
On Sat, 31 Dec 2005 16:48:14 -0700, you wrote:
Chuck Guzis wrote:
There is nothing about the logic fabric of FPGAs that has a bias for 4 bits.
You can build (and I have) arithmetic data paths of any bit width, even 17
if it makes sense.
The current FPGAs internal large memory blocks tend to have memories
with widths that are multiples of 9 bits (8+parity), but they also handle widths
of 1 bit too. (note that the 9th bit can be used for parity, but does not have to be).
Philip Freidin.
Ex product planning manager for Bit Slice products at AMD 1986..1989
Ex product planning manager at Xilinx 1989..1995
=================
Philip Freidin
philip at fliptronics.com
On 12/31/2005 at 1:19 PM e.stiebler wrote:
Yup, the FPGAs are also organized by 4 bits, so that's why it would be
preferable to use something like that. 20 Bits is bad however, as soon
as you like to have external memory What about very simple 16 bit risc ?
4 bit opcode, 4 bit destination , 4 bit source 1, 4 bit source 2 ?
You know, there is a small community of folks using FPGAs to implement all
sorts of interesting architectures, including the one you've just
described. Perhaps it's worth a look...