6 Oct
2012
6 Oct
'12
4:41 p.m.
From: Rob Doyle
Sent: Friday, October 05, 2012 5:22 PM
On 10/4/2012 9:27 PM, Eric Smith wrote:
> The KL10 came in two versions, referred to as
"Model A" and "Model B".[*]
> The difference is that the Model A supports the
traditional 256KW
> user address space, as was found on the earlier KI10 and KS10. The
> Model B adds the concept of "sections", which adds another 12 bits to
> the logical address, although the KL10 Model B only implements 5 of
> them, for a maximum of 32 sections. This expands the user address
> space to 8 Mwords.
... keeping this on topic.
I can get 2MW x 36 of memory in a single chip.
I know that there is no such thing as typical but...
How much memory did KL10s have? What was a large
machine? Mid?
Small?
The KL-10 (and the predecessor KI-10) could address up to 4MW physical.
Until semiconductor memory became common, of course, that was mostly a
theoretical limit; by 1984 it was not uncommon to find a KL with four
internal memory bays of 768KW each, for a total of 3MW. With the
upgrade to take a 2060 to a 2065, that was reduced in count to two bays
of 2MW each, for the 4MW limit. Of course by that time, many people
were beginning to migrate away from the PDP-10 architecture, but as late
as June 1995 there were at least 60 4MW systems left in the world.
(They were all gone by June 1996.)
A small KL-10 system would have 1-2 section's worth of real memory,
256-512KW. A medium sized system would have had 1.5-2MW.
Rich Alderson
Vintage Computing Sr. Systems Engineer
Vulcan, Inc.
505 5th Avenue S, Suite 900
Seattle, WA 98104
mailto:RichA at vulcan.com
mailto:RichA at LivingComputerMuseum.org
http://www.LivingComputerMuseum.org/