confimation
I have just examined on a real BK0010 using Mirage the debugger
the msbyte of the address 177716 is always 100 whatever you do (as I can
see),the lsbyte varies but not the msbyte ,so the principle that the
starting address of the processor is made od the msbyte of address
177716+000 for lsbyte.100+000 gives an adress of 100000,type g100000 in the
debugger makes a good clean start of the machine.I think it is a register in
the support circuit k1801BM1-014
best regards
a.n
----- Original Message -----
From: "nierveze" <nierveze at radio-astronomie.com>
To: "General Discussion: On-Topic Posts Only" <cctech at classiccmp.org>
Sent: Saturday, December 10, 2011 11:26 AM
Subject: Re: russian PDP-11 like K1801BM2 CPU Startup reading w/o address?
hello,the startup procedure of those processors is
rather
sophisticated,here here is what I have found:
first it is for the k1801BM1 and BM2:
*at beginning if times everything is at zero....(DCLO,ACLO are low)
*when you apply power to the processor and the clock the clock starts
immediatly and the processor begins to count clock states also
*DCLO must be low for 5 ms at least ,during this time the processors
clears the registers,that contain random data at powerup,at the end if
this period internal INIT goes hight ,the processor begins to work
*ACLO should be low for 70 ms
*after there arre differences in the processors:
*the 1801BM1 find the msb of the pc from address 177716(selected by
SEL1),the lsb of
the pc is filled with zeroes,this forms the starting address .Ths PSW is
filled with value 340.This addres is in the I/O page,maybe it can be
physically in a small rom,
a register bank ,or in support circuit???
*for the1801BM2 the msb of the pc from a non address register (maybe a
74ls 244 programmed by a bank of switches as in the case of the
T11),selected by SEL ,the lsb is filled by zeros ,this fixes the starting
address in rom,the PSW is found at this addess +2
Here is what I have found ,my russian knowledge is maybe more
poor as hours:-)))
I have understood this from a file found on the site of Serguei Vakulenko
(vak.ru,page of projects)
You can find here also the pdf of the 1806 ,the successor of those
microprocessors that use a similar startup procedure.
I was not able to understand where those registers are from schematics
of BK0010 or BK0011 because they use support chips whose docs I do not
have .
But the clock of those computers may be used with the timings for the
startup procedure.
Timing and reset circuits can be found in 'personal computers BK -0010
BK-0011 5/95 ' in the archives of BK
Can you please explain more precisely what you have done???
Thanks best regards
Alin Nierveze
----- Original Message -----
From: "Holm Tiffe" <holm at freibergnet.de>
To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
Sent: Friday, December 09, 2011 6:20 PM
Subject: Re: russian PDP-11 like K1801BM2 CPU Startup reading w/o address?
HI Devin,
In the meantime I've found out whats going on there, I've put that CPU on
a testboard and applied power and clock.
Nevertheless your links are very interesting, still have many threads to
read on those sites.
Thanks,
Holm
Devin Monnens wrote:
Holm,
I asked one of my colleagues who is working on computer research in
Ukraine. He did not have a direct answer to your question, but provided
these sources to check for solutions to your problems:
http://forum.maxiol.com/index.php?showtopic=4599 - look here
http://ramlamyammambam.livejournal.com/149983.html?format=light - ask
here or maybe here:
http://ru-radio-electr.livejournal.com/229706.html?thread=3609418&forma…
- I know user suvorow_ as a good specialist.
-Devin Monnens
------------------------------
Message: 14
Date: Sat, 3 Dec 2011 16:44:24 +0100
From: Holm Tiffe <holm at freibergnet.de>
To: cctech at
classiccmp.org
Subject: russian PDP-11 like K1801BM2 CPU Startup reading w/o address?
Message-ID: <20111203154424.GA56131 at pegasus.freiberg-net.de>
Content-Type: text/plain; charset=iso-8859-1
I want to play with a russian K1801BM2 CPU (K1801VM2).
My russian from the school is very very rusty and so I have problems
to
understand what's going on with this CPU while startup.
There is some "besadresnoe tschtanie", a read from the bus w/o
sending out an address before w/o active SYNC.
It is right, that this read is building the upper 8 bits from the
start
address in the rom area with Systemu Mode (Halt Mode) = 1?
Can anyone please confirm this?
BTW: how is this external register to be done in HW?
Does anyone know if there are schematics of SBCs existing w/o special
support ICs like The K1801VP1-55 or so?
Kind Regards and thanks in advance,
Holm
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