28 May
2016
28 May
'16
6:22 p.m.
Whoops, sent too soon..
Could someone also clarify what is meant by "gates" in this sense? Are we
talking about the gates (G) of a FET, as in Gate, Drain and Source - or are
we referring to the composite logic gates (NAND, etc.), built up of
multiple bipolar - or MOS - transistors?
On Sat, May 28, 2016 at 8:19 PM, drlegendre . <drlegendre at gmail.com> wrote:
@Eric, All,
Light a candle for those in the dark..
If the min. clock speed is dictated by the ability of the gates to hold a
charge, as the bits rot away as charge drains (someone said "minimize
resistance to ground", but I believe they meant "maximize"?) , then what
is
limiting the max. clock speed?
Is it just basic PCB stuff, like trace inductance, mutual / parasitic
capacitance, etc? Or are there other, more critical factors? I can't
imagine propagation delays could matter at these slow speeds.. requiring
meandering of traces and so forth.
On Sat, May 28, 2016 at 2:55 PM, Corey Cohen <applecorey at optonline.net>
wrote:
On May 28, 2016, at 1:31 PM, Eric Smith
<spacewar at gmail.com> wrote:
> On Sat, May 28, 2016 at 5:31 AM, Corey Cohen <applecorey at optonline.net>
wrote:
> I can't wait to buy one!!! I have a
spare Replica-1 just waiting to
hook up to a Monster 6502.
It doesn't run at full speed. It presently runs in the tens to low
hundreds of kHz. If a Replica-1 can be run slower than normal, that
might work. Other common 6502-based micros, such as the Apple II or
Atari 400/800 will not work at low speed due to inherent timing
requirements related to video generation and DRAM refresh.
> Just need to wire up a single step switch and this thing will be
awesome!!!
If you wire single-stepping using the RDY line, that should work,
though it will only single-step read cycles, not write cycles.
You can't single-step the actual clock because it is dynamic logic.
The replica-1 uses a propellor chip for video and static ram so I don't
think it's that critical to timing.