Slightly-OT: Philips SAA5240 User's Manual

Tony Duell wrote: I think I can figure out >95% of the chip's functionality as-is, but at this point: * Ghost Rows mode (the 5243 appears to call this "Extension Packet Enable" in the R1/Mode register): how does it affect the memory map -- i.e. where are the additional rows stored? To read them, do you just specify Row 30 (say) in R9 (Active Row) before reading from R11 (Active Data)? Is there any effect on the function of the Bank Select and Acq Circuit bits (which seem to provide the upper address bits) if Extension Packets are enabled (the datasheet says you need a 2K RAM if EPE is on, or a 1K without -- which suggests that the upper address outputs might not work as they do in "normal" mode)? * R1 register: permitted states for the T1 and T0 bits. What do the 4 settings (00/01/10/11) do / which ones are valid? * R1 register: TCS -- "Text composite sync or direct sync select". Am I right in thinking this just selects whether the chip syncs the video output to the CVBS input or the signal passed to the TCS/SCS pin? * R2 register: Start Column bits. All the datasheet says is "Start column for page request data"... so what do these do? Cheers, -- Phil. philpem at philpem.me.uk http://www.philpem.me.uk/