PDP 8/e, RK8E Weirdness

At Paul's suggestion, this afternoon, I got the essentials stuffed into one Omnibus. Packed in there was the Front Panel, CPU/EAE, 2x4K Core sets, Mem Ext/Timeshare, RX8E, RK8E set, M8650 Serial, and bus loads board. It all just barely fit -- there is one free slot. After checking to make sure that nothing was interfering or touching between the boards, I powered up the 8/e with baited breath. It powered up OK, no smoke. I restarted OS/8 from 07605, and spun up the RK05, and ran RLKFMT. It went through the write pass with no problems (as usual), and made it through a good chunk of the read verify pass, but failed at exactly the same place as it did before (as soon as the disk address went to 1xxxx). I did a ZERO RKA0:, and then tried to do DIR RKA0:, and it gave the director error as usual. I then fired up DHRKAE (Diskless Controller Test), and it failed in the exact same place, TST81, the first data break transfer test. So, whatever is going on acts exactly the same with a relatively minimized system packed onto one Omnibus. Next step is to put the system back the way that it was, and then tack some wires onto the RK8E on M7105 (Major Registers) board, to monitor the LOAD and CLOCK signals on the 74161 counters that make the up current address register, to see if there is a transient on the clock line, as David H. observed on his system. If the CLOCK signal does have a transient on it after the LOAD pulse has finished (the load of the current address register is clocked in by the clock signal), the transient could cause the counter to increment by one before any DMA transfers start, which could create the symptom that I am setting. Don't know if I'll have time to do this today, but if not, perhaps tomorrow. I will post updates as information is available. Thanks again to all for the suggestions. Rick Bensene