15 Oct
2019
15 Oct
'19
5:25 p.m.
On 10/3/2019 1:04 PM, Guy Sotomayor Jr via cctalk wrote:
FYI, not ALL PDP-11 implementations can do this. In particular, the J11
(used in PDP-11/73 and others) does not map the registers into memory
locations. I suspect, but have not verified, that any PDP-11 processor
with multiple register sets (e.g., one for user one for kernel, etc.)
are likely to behave this way.
(One on one reply since the message was quite old.)
JRJ
On Oct 3, 2019, at 10:26 AM, Paul Koning via
cctalk <cctalk at classiccmp.org> wrote:
So does the PDP-11. The 8 registers are mapped to the top 8 words of memory so you can
do some quite interesting things. It is also possible to run a (small) program in only
the registers (e.g. no memory at all).
TTFN - Guy
On Oct 3, 2019, at 12:39 PM, Chuck Guzis via
cctalk <cctalk at classiccmp.org> wrote:
On 10/3/19 9:01 AM, Noel Chiappa via cctalk wrote:
Then again, the PDP-10 has that "two ways to refer to it" as well. In that
case, you do have dedicated register logic, and what happens is that memory addresses 0-15
are instead redirected to the register array. The same applies to the EL-X8. The way you
can address things doesn't necessarily tell you what sort of storage mechanism is used
for it.
The PDP-6 and KA10 (basically a re-implementation
of the PDP-6 architecture)
both had cheapo versions where addresses 0-15 were in main memory, but also
had an option for real registers, e.g. in the PDP-6: "The Type 162 Fast
Memory Module contains 16 words with a 0.4 usecond cycle." The KA10 has
a similar "fast memory option".
A bit more contemporary example might be the low-end PIC
microcontrollers (e.g. the 12F series). Harvard architecture (14 bit
instructions, 8 bit data), but data is variously described as
"registers" (when used an instruction operand) or "memory" when
addressed indirectly. That is, the 64 bytes of SRAM can be referred to
as either a memory location or as a register operand.