28 May
2016
28 May
'16
7:12 p.m.
So what's the reasoning behind using gate capacitance (or inductance) to
store the bit state? It would seem obvious that setting a bi-stable hi or
lo would be a much more reliable method of saving the state.
Is it a matter of power consumption, or switching speed, or both?
On Sat, May 28, 2016 at 8:49 PM, Brent Hilpert <hilpert at cs.ubc.ca> wrote:
On 2016-May-28, at 6:22 PM, drlegendre . wrote:
Could someone also clarify what is meant by "gates" in this sense? Are we
talking about the gates (G) of a FET, as in Gate, Drain and Source - or
are
we referring to the composite logic gates (NAND,
etc.), built up of
multiple bipolar - or MOS - transistors?
Yes, they're talking FET gates, the internal registers would operate under
the same basic principle as DRAM does.
Other early microprocs used dynamic registers, I forget which, perhaps
others can list them.
Far from the first time a processor had dynamic registers.
I've been told that the IBM 709 used inductive (rather than capacitive)
storage for the main registers.