31 Jan
2018
31 Jan
'18
10:56 a.m.
On 01/31/2018 12:00 PM, Chuck Guzis via cctalk wrote:
On 01/31/2018 06:00 AM, Paul Koning via cctalk wrote:
I had a problem with a 16-bit binary counter not having
enough frequency resolution, and looked at using ECL to be
able to double the clock. After much calculating, I found
that there was not a huge improvement with the ECL. And, if
you went to 74S, Fast or 74AS, you could easily match the
ECL 10K performance. Now, there were a bunch of tricks that
you could use with ECL that helped, like wired-OR instead of
adding a tri-state buffer. ECL had a notable advantage in
1970, but as TTL derivatives continued to advance, that
shrank to nothing.
Jon
Wow, 10 years later, with faster chips, and still
the same speed? That's surprising.
I believe that Honeywell went through a
similar exercise at one point.
An all-ECL redesign (details escape me) resulted in no appreciable
improvement in performance.