30 Jul
2006
30 Jul
'06
9:19 a.m.
Pierre-Marie BOYER wrote:
Hi !
The ADC send data to the SDRAM through the DMA at a fixed rate during
may be 1 or 2 second, and is this process
can be stopped/disturbed by the internal refresh process of SDRAM ?
If yes, is there a solution, to manage the two process ( fixed
acquisition and SDRAM refresh cycle) ?
Thank you very much.
If you are only collecting ADC data at that rate, can you use an I/O mapped
device instead of DMA, and just poll and read the data? Or are you saying
that the ADC data will start up and run at some rate approaching the memory
cycle time for 1 to 2 seconds?
Take discussion offline if too many object to ARM as too off topic.
Jim