large data transfert (write) to SDRAM at fixed frequency

Hi ! I am new in electronic. I want to make an analog acquisition board with an ARM microcontroler ( Samsung S3C44B0x 66MHz) with a 8Mbytes SDRAM and an A/D converter( Analog AD775 ). The sampling rate of the A/D converter is at 30Mhz, and i would like to connect its digital output to the S3c44b0x data bus by using the DMA of the uC. Data sent by the ADC will be wrote to the SDRAM by using the DMA of uC. But the number of sampling can be very large, and the acquisition/transfert occur at a fixed rate (30 Mhz). The acquisition time and transfert to SDRAM can be more than 64ms (refresh time cycle of SDRAM). So, my question is : ?is the internal refresh cycle of SDRAM can disturb the data writing by the DMA to the SDRAM ? The ADC send data to the SDRAM through the DMA at a fixed rate during may be 1 or 2 second, and is this process can be stopped/disturbed by the internal refresh process of SDRAM ? If yes, is there a solution, to manage the two process ( fixed acquisition and SDRAM refresh cycle) ? Thank you very much. -- ------------------------------ M. BOYER Pierre-Marie Hameau de Biranques 34380 Notre Dame de Londres Tel : 04.67.55.09.17 ------------------------------