On 2014-Sep-02, at 3:12 PM, drlegendre . wrote:
So then, let's move on to the section on
configuring the switches on the
board. Frankly, it appears not only confusing and just plain wrong, it also
appears to contradict itself. I think this is the stuff that Brent was
mentioning earlier - if you set those switches the way the doc indicates,
the memory gets mapped to the top-end of the 64K range, as opposed to the
bottom end. That one I verified. Also, the switches on the board are in
reverse order vs. the switch tables drawn in the manual
It's confusing because:
- there's half-a-dozen levels of inversion going on in the circuitry,
- they installed some switches with the opposite open/closed orientation to that of the
design,
- and the off/on in the doc refers to the bit values, not the switch positions.
I think the four address-group switch-sets for your board should be:
UUDD DUDD UDDD DDDD
U = up, towards top edge of board
D = down, towards edge connector
The other small switch-set WA/BO/BD looks opposite to the doc too.
Then there's the strange statement..
"closed=0 open=1", bottom of p.1-5.
Now that defies every convention known to man.. 0=false=open=off /
1=true=closed=on in my world.
Sometimes the convention used in some field of study (boolean logic) doesn't match up
with a physical implementation (TTL electronics).
Closing the switch pulls the line low, to GND. This is standard with TTL because TTL is in
an implementation class of logic called current-sinking logic (look up a resource that
shows how TTL works electrically).
It's much more power-efficient to do it this way than the reverse. Also, sometimes
it's preferable to have one side of a switch at GND rather than +V.
Whether that closed switch is going to match or complement the '1' in an address
bit depends on how many inversions occur in the address comparison circuitry.
Anyways .. Yay! - a functioning Altair.